Orlando Moreira
Ericsson
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Publication
Featured researches published by Orlando Moreira.
acm symposium on applied computing | 2007
Orlando Moreira; Jacob Jan-David Mol; Marco Jan Gerrit Bekooij
We propose an online resource allocation solution for multiprocessor systems-on-chip, that executes several real-time, streaming media jobs simultaneously. The system consists of up to 24 processors connected by an AEthereal [7] Network-on-Chip (NoC) of 4 to 12 routers. A job is a set of processing tasks connected by FIFO channels. Each job can be independently started or stopped by the user. Each job is annotated with resource budgets per computation task and communication channel which have been computed at compile-time. When a job is requested to start, resources that meet the required resource budgets have to be found. Because it is done online, allocation must be done with low-complexity algorithms. We do the allocation in two-steps. First, tasks are assigned to virtual tiles (VTs), while trying to minimise the total number of VTs and the total bandwidth used. In the second step, these VTs are mapped to real tiles, and network bandwidth allocation and routing are performed simultaneously. We show with simulations that introducing randomisation in the processing order yields a significant improvement in the percentage of mapping succdesses. In combination, these techniques allow 95% of the processor resources to be allocated while handling a large number of job arrivals and departures.
real time technology and applications symposium | 2005
Orlando Moreira; Jan David Mol; Mjg Marco Bekooij; J. van Meerbergen
An embedded multiprocessor that can run multiple hard-real-time (HRT) jobs simultaneously has to guarantee that enough resources are available to meet the timing constraints. It is essential that both application model and hardware be tailored to this goal. Moreover, suitable resource allocation and scheduling are needed. This paper proposes a resource allocator that gives guarantees for HRT streaming applications. Because new jobs arrive during operation, resource allocation is performed at run-time. This provides admission control. Resource budget enforcement is handled by local schedulers. We formalize our resource allocation problem and show that it is NP-complete. We developed heuristics to tackle the problem during runtime and evaluated them. A modified First-fit Vector Bin-Packing algorithm provides a good solution; it can allocate 95% of the resources, while handling a large number of job arrivals and departures on a heavily loaded system.
software and compilers for embedded systems | 2004
Marco J. G. Bekooij; Orlando Moreira; Peter Poplavko; B. Mesman; Milan Pastrnak; Jef L. van Meerbergen
Consumers have high expectations about the video and audio quality delivered by media processing devices like TV-sets, DVD-players and digital radios. Predictable heterogenous application domain specific multiprocessor systems, which are designed around a networks-on-chip, can meet demanding performance, flexibility and power-efficiency requirements as well as stringent timing requirements. The timing requirements can be guaranteed by making use of resource management techniques and the analytical techniques that are described in this paper.
Dynamic and Robust Streaming in and between Connected Consumer-Electronic Devices | 2005
Marco J. G. Bekooij; Rob Hoes; Orlando Moreira; Peter Poplavko; M Milan Pastrnak; B. Mesman; Jan David Mol; Sander Sander Stuijk; Valentin Gheorghita; J Jef van Meerbergen
Dataflow analysis techniques are key to reduce the number of design iterations and shorten the design time of real-time embedded network based multiprocessor systems that process data streams. With these analysis techniques the worst-case end-to-end temporal behavior of hard real-time applications can be derived from a dataflow model in which computation, communication and arbitration is modeled. For soft real-time applications these static dataflow analysis techniques are combined with simulation of the dataflow model to test statistical assertions about their temporal behavior. The simulation results in combination with properties of the dataflow model are used to derive the sensitivity of design parameters and to estimate parameters like the capacity of data buffers.
IEEE Transactions on Computers | 2010
Orlando Moreira; Aa Twan Basten; Mcw Marc Geilen; Sander Sander Stuijk
Single-Rate Data-Flow (SRDF) graphs, also known as Homogeneous Synchronous Data-Flow (HSDF) graphs or Marked Graphs, are often used to model the implementation and do temporal analysis of concurrent DSP and multimedia applications. An important problem in implementing applications expressed as SRDF graphs is the computation of the minimal amount of buffering needed to implement a static periodic schedule (SPS) that is optimal in terms of execution rate, or throughput. Ning and Gao [1] propose a linear-programming-based polynomial algorithm to compute this minimal storage amount, claiming optimality. We show via a counterexample that the proposed algorithm is not optimal. We prove that the problem is, in fact, NP-complete. We give an exact solution, and experimentally evaluate the degree of inaccuracy of the algorithm of Ning and Gao.
Embedded systems | 2013
Orlando Moreira; Henk Corporaal
This book provides a comprehensive overview of the state-of-the-art, data flow-based techniques for the analysis, modeling and mapping technologies of concurrent applications on multi-processors. The authors present a flow for designing embedded hard/firm real-time multiprocessor streaming applications, based on data flow formalisms, with a particular focus on wireless modem applications. Architectures are described for the design tools and run-time scheduling and resource management of such a platform.
digital systems design | 2011
Andrew Nelson; Orlando Moreira; Anca Mariana Molnos; Sander Sander Stuijk; Bt Nguyen; Kgw Kees Goossens
Energy efficient execution of applications is important for many reasons, e.g. time between battery charges, device temperature. Voltage and Frequency Scaling (VFS) enables applications to be run at lower frequencies on hardware resources thereby consuming less power. Real-time applications have deadlines that must be met otherwise their output is devalued. Dataflow modelling of real-time applications enables off-line verification of the applications temporal requirements. In this paper we describe a method to reduce the combined static and dynamic energy consumption using a Dynamic VFS (DVFS) technique for dataflow modelled real-time applications that may be mapped onto multiple hardware resources. We achieve this by using an applications static slack in order to perform DVFS while still satisfying the applications temporal requirements. We show that by formulating a dataflow modelled application and its mapping as a convex optimisation problem, with energy consumption as the objective function, the problem can be solved with a generic convex optimisation solver, producing an energy optimal constant frequency per application task. Our method allows task frequencies to be constrained such that, e.g. one frequency per application or per processor may be achieved.
international symposium on system-on-chip | 2011
Fm Firew Siyoum; Mcw Marc Geilen; Orlando Moreira; Rjm Rick Nas; Henk Corporaal
Contemporary embedded systems for wireless communications support various radios. A software-defined radio (SDR) is a radio implemented as concurrent software processes that typically run on a multiprocessor system-on-chip (MPSoC). SDRs are real-time streaming applications with throughput requirements. One efficient approach for timing analysis of concurrent real-time applications is the dataflow model of computation (MoC). Nonetheless, the dataflow modeling of SDRs is challenging due to their dynamically changing data processing workload. A dataflow MoC that is not expressive enough to capture this dynamism gives pessimistic throughput results. On the other hand, if it is too expressive and detailed, it may not be analyzable at all. In this paper, we address the challenge of dataflow modeling of SDRs such that their timing behavior can be accurately analyzed to guarantee real-time requirements without unnecessarily over-allocating MPSoC resources. The basis of our modeling approach is splitting the dynamic data processing behavior of a SDR into a group of static modes of operation. Each static mode of operation is then modeled by a Synchronous Dataflow (SDF), which we refer to as scenario. This paper has two main contributions: 1) a scenario-based dataflow model of Long Term Evolution (LTE), which is the latest standard in cellular communication, and 2) investigation of existing throughput analysis techniques of SDF scenarios for our LTE model. Our results show that scenario-based worst-case throughput computation is 2 to 3.4 times more accurate than a state-of-the-art SDF analysis technique. Our investigation also shows that existing timing analysis techniques of SDF scenarios have very low run-time that scales very well with increase in graph size. This makes SDF scenarios suitable in practice for modeling and analyzing SDRs as well as similar dynamic applications.
acm symposium on applied computing | 2013
Pengcheng Huang; Orlando Moreira; Kees Goossens; Anca Mariana Molnos
Voltage and Frequency Scaling (VFS) can effectively reduce energy consumption at system level. Most work in this field has focused on deadline-constrained applications with finite schedule lengths. However, in typical real-time streaming, processing is repeatedly activated by indefinitely long data streams and operations on successive data instances are overlapped to achieve a tight throughput. A particular application domain where such characteristics co-exist with stringent energy consumption constraints is baseband processing. Such behavior requires new VFS scheduling policies. This paper addresses throughput-constrained VFS problems for real-time streaming with discrete frequency levels on a heterogeneous multiprocessor. We propose scaling algorithms for two platform types: with dedicated VFS switches per processor, and with a single, global VFS switch. We formulate Local VFS using Mixed Integer Linear Programming (MILP). For the global variant, we propose a 3-stage heuristic incorporating MILP. Experiments on our modem benchmarks show that the discrete local VFS algorithm achieves energy savings close to its continuous counterpart, and local VFS is more effective than global VFS. As an example, for a WLAN receiver, running on a modem realized as a heterogeneous multiprocessor, the continuous local VFS algorithm reduces energy consumption by 29%, while the discrete local and global algorithms reduce energy by 28% and 16%, respectively, when compared to a on/off energy saving policy.
international conference on hardware/software codesign and system synthesis | 2012
Fm Firew Siyoum; Mcw Marc Geilen; Orlando Moreira; Henk Corporaal
Wireless embedded applications have stringent temporal constraints. The frame arrival rate imposes a throughput requirement that must be satisfied. These applications are often dynamic and streaming in nature. The FSM-based Scenario-Aware Dataflow (FSM-SADF) model of computation (MoC) has been proposed to model such dynamic streaming applications. FSM-SADF splits a dynamic system into a set of static modes of operation, called scenarios. Each scenario is modeled by a Synchronous Dataflow (SDF) graph. The possible scenario transitions are specified by a finite-state machine (FSM). FSM-SADF allows a more accurate design-time analysis of dynamic streaming applications, capitalizing on the analysability of SDF. However, existing FSM-SADF analysis techniques assume 1) scenarios are self-timed bounded, for which strong-connectedness is a sufficient condition, and 2) inter-scenario synchronizations are only captured by initial tokens that are common between scenarios. These conditions are too restrictive for many real-life applications. In this paper, we lift these restrictive assumptions and introduce a generalized FSM-SADF analysis approach based on the max-plus linear systems theory. We present both exact and conservative worst-case throughput analysis techniques that have varying levels of accuracy and scalability. The analysis techniques are implemented in a publicly available dataflow analysis tool and experimentally evaluated with different wireless applications.