P. Bonyhard

A theory of digital magnetic recording on metallic films

A theory is presented predicting the performance of thin magnetic tape as a digital storage medium. The NRZ recording properties are discussed with reference to the properties of both the tape and the replay head. Expressions are derived relating the isolated pulse width, the output voltage, and the packing density to the coercivity and thickness of the tape, the head gap length, and the head-to-tape separation. The theoretical predictions are then compared with experimental results measured over a wide range of head and tape properties. The agreement obtained is excellent.

Applications of bubble devices

The applications of magnetic bubbles that are currently seen as most attractive and the current status of development of such devices are considered. A major application is thought to occur in solid-state mass memories. An attractive form of organization is possible whereby relatively short access times can be achieved while using only a small number of read and write circuits. A repertory dialer memory, which has been chosen as a test vehicle, has been developed. The design and performance of the propagating circuits, the self-latching magnetic gates and the generator, which comprise the memory, are discussed. A novel area of application may be in pulse code modulation (PCM) switching networks. It is shown how a network operating as a PCM crossbar switch can be designed using bubbles. A circuit is described which can eliminate the delay associated with bubble propagation in such networks.

68 kbit capacity 16 µm-period magnetic bubble memory chip design with 2 µm minimum features

A bubble propagating structure that operates well on a 14 μm to 18 μm propagate period with a nominal 2 μm minimum feature size has been designed. The structure consists of only 1 discrete permalloy feature per circuit period. Sixty-eight kbit-capacity memory chips based on such structures have been designed, built, characterized, packaged and the packages have been characterized. The chip is organized as a set of minor (storage) loops with separate write and read major lines. The bubble manipulating functions, of which the replicate and transfer gates are the most critical, have also been designed with 2 μm minimum features. The design is adequate to provide a 14 Oe bias field margin range with drive fields of about 35 Oe, using a bubble garnet material with approximately 170 Oe free bubble collapse field. Sixty-eight kbit single loop shift register type chips designed using similar propagating structures, however, provide over 20 Oe bias field margin ranges with drive fields of about 35 Oe.

Magnetic bubble memory chip design

The choice and organization of bubble-circuit functions in the design of a magnetic bubble mass memory chip are discussed with emphasis on factors such as circuit function compatibility and performance, circuit density, and processing simplicity. A specific major-minor organized chip design is described which uses rotating field driven propagation,

Dollar-sign transfer for magnetic bubbles

-sign transfer gates, all T-bar minor loops, a nucleate generator with chevron merging port, a chevron based replicator/ annihilator and a chevron guard rail expander detector. The overall operating characteristics of chips having 20 510 bits of storage capacity have been measured and a bias field margin of 12 Oe is typically obtained with a 25 Oe, 100 kHz rotating field.

Dynamic data reallocation in bubble memories

The evolution and characteristics of dollar-sign transfer gates for use in bubble mass memories are described. With this type of gate both directions of transfer require only a single conductor and unipolar current pulses. Directionality is achieved by the phase relationship between the transfer current pulse and the rotating field. It is shown that ordinarily the transfer function performs bidirectionally over the entire propagation range at current amplitudes of the order of 35 mA. Experiments on a 20 kbit chip indicate that over a range of rotating field between 25 and 35 Oe and a bias field range of 74 to 85.5 Oe, the worst-worst margins on the transfer current amplitude, phase and pulsewidth are ±14%, ±11° and ±23%, respectively.

Device Design and System Organization for a Decoder Accessed Magnetic Bubble Memory Chip

Bubble technology offers several operations that have no equivalents in technologies based on magnetic recording. Examples of such operations are transfer, reversal of the direction of propagation, and opening and closing of gaps in the data stream. This paper shows how such operations can be used to dynamically reallocate data in the bubble memory, causing it to become an integrated memory hierarchy. A model is presented which relates the bubble memory with dynamic reallocation to stack processing, a technique used in the evaluation of memory hierarchies. With the aid of this model it becomes possible to calculate the performance of the bubble memory using published data derived from the traces of selected typical programs. Design parameters are proposed for a 2 Mbit bubble memory with 128 detectors which in the execution of such programs requires an average of only 8.8 shifts for access and an average of 12 shifts per memory cycle. If bubbles are propagated at a rate of 1 MHz, the average access and cycle times for this memory become 8.8 μs and 12μs, respectively. Such performance, in combination with the low cost per bit offered by bubble technology, is expected to have a major impact.

Large capacity ion-implanted bubble devices

We have examined the feasibility of taking advantage of the superior access speed of the decoder organization of magnetic bubble memory chips, while retaining the wide operating margins and high degree of data integrity that have been achieved for major/minor loop organized chips. A semicircular bubble replicator has been designed and characterized that can be placed at the corner of T‐Bar information storage loops. A novel decoding matrix, in which the half period wide control conductors simply retard the propagation of all bubbles other than the one selected, has been designed and operated. The bias field margins for both replication and decoding have been found to be substantially as wide as those for simple propagation. The difficulty in the initial design, that the output to be detected appears at different points depending on the selection address, is not a problem because of the incorporation of a multi‐input chevron expander detector. A solution was found to the problem of erasing old information ...

An experimental magnetic bubble time‐slot interchanger

Half-megabit bubble memory chips, with patterned ion implants used to propagate bubbles, have been designed and characterized. Bubbles with 1.7-μm diameter were used on a 6-μm to 8-μm circuit period and were propagated by rotating fields of 40 Oe at 50 kHz. The chips had 284 2051-bit storage loops, of which 258 were required to operate. Overall bias field margin ranges of 16 Oe to 19 Oe have been demonstrated on functionally complete, nonvolatile chips with nondestructive readout. Most functional parameters have wide margin ranges, but further design improvements are necessary to widen the margin ranges of the drive field and the transfer-out trailing edge phase.

A true swap gate for magnetic bubble memory chips

One of the basic building blocks of a time‐division switching network is a time‐slot interchanger (TSI). This paper reports on the design and characterization of a small experimental magnetic bubble time slot interchanger (TSI) which handles 4 times slots per time‐frame with with 2 bits per time slot.Current ’’state‐of‐the‐art’’ technology for bubble memories is utilized. The bit period is 28.8 μm and the propagation rate is 100 kHz. The overall operating bias field margin range obtained fwith 25 Oe rotating field is 6 Oe. The limiting function is a passive AND/OR logic gate. A unidirectional transfer gate is used in the TSI to transfer routing bubbles into the storage loops. The operating bias margin for the transfer gate is nearly equal to that of loop propagation.