P. Choulat

Rear Surface Passivation for Industrial Solar Cells on Thin Substrates

The use of hydrogenated silicon nitride is one of the most significant technological evolutions that has taken place in solar cells industry, due to its ability to act simultaneously as antireflective coating as well as a source of hydrogen for surface and bulk passivation. These very same properties make it an ideal candidate for rear surface passivation in structures with local contacts, yet its application has led so far to results below expectation. This work analyses limits and phenomena that prevent the use of standard nitride as rear surface passivation layer in commercial solar cells and presents a convenient process that can be used to overcome these problems and allows the fabrication of industrial, fully screen printed, PERC-type solar cells on ultrathin substrates. By means of this technology the cells open circuit voltage shows a significant improvement with respect to the conventional aluminum BSF and is retained all the way down to 100 mum thick devices

Advanced phosphorous emitters for high efficiency Si solar cells

A homogeneous emitter designed for a high efficiency Si solar cell needs to fulfill specific requirements: (1) a low surface concentration of dopants and (2) a good contact resistance. The emitter formation is studied in detail for an optimized POCl3 diffusion scheme and for plasma doping.

Light-induced degradation of very low resistivity multi-crystalline silicon solar cells

An J/sub sc/ degradation under illumination has been measured for finished solar cells processed from multicrystalline B-doped Si-substrates with resistivities below 0.1 /spl Omega/ cm. This phenomenon has been studied as function of the different applied processing steps and as function of the boron- and oxygen-concentration of the substrate. The observed effect is likely related to a reversible formation of boron-oxygen complexes, introducing traps in the bandgap. This behaviour is similar to what has been reported in literature for carrier lifetime instabilities of 1 /spl Omega/ cm Cz-Si. The degradation was found to be fully reversible by a low-temperature anneal at about 200/spl deg/C, provided that the degradation causing defects have not been passivated by hydrogenation.

Impact of Rear-Surface Passivation on MWT Performances

Back-contact metal-wrap-through (MWT) solar cells are very attractive for implementation into industrial production lines. They combine the advantages of back-contact cells and the potential of easy integration into the production lines of standard cells. Nonetheless, they tend to show lower fill factors and open-circuit voltages than conventional cells. This is attributed to a non-linear shunt behavior under the emitter busbars and is believed to arise from a too-deep penetration of the silver paste printed on the emitter region on the rear during the firing step. In order to improve the MWT solar cells performances, we propose to deposit on the rear-surface a full coverage layer of a dielectric material. This layer is used first to protect the emitter during the firing step; but if it is smartly chosen, it can also be used as passivating layer for the base surface. In this work, we have processed 12.5times12.5 cm2 mc-Si wafers into 220-mum-thick MWT cells, including the deposition of a passivating dielectric layer on the rear surface. By means of dark lock-in thermography measurements, we observe that the shunting effect in the resulting cells is greatly reduced compared to neighboring cells processed into MWT with an Al-BSF rear-surface passivation. The dielectric plays in addition its role of surface passivation, according to the nearly 7 mV increase observed on the open-circuit voltage even on thick wafers. We also observe a 1.4% FF absolute increase, resulting in a 0.6% absolute efficiency increase

Advanced dry processes for crystalline silicon solar cells

Significant cost reduction of bulk crystalline silicon solar cells requires the removal of the technological barriers that impede the development of a high throughput, low cost, and reliable industrial process on thin substrates. Present industrial surface conditioning and rear surface passivation processes do not meet the requirements for yield and performance on thin substrates. In addition, large-scale production brings about the issue of the environmental impact of PV processing and its related externalities, which may contribute a significant part of the final costs and are so far, underestimated or belittled. In this paper we present an advanced, plasma-based processing technology, suitable for industrial production of bulk silicon solar cells on thin substrates and capable of meeting the PV market growth challenge with a low environmental impact and a competitive cost. The modified processing steps include plasma etching and texturing, dielectric passivation and rear side local contact schemes. Each step is compatible with the standard process sequence, can be integrated separately in the production line and leads to improved performance and/or cost reduction.

The impact of silicon solar cell architecture and cell interconnection on energy yield in hot & sunny climates

Extensive knowledge of the dependence of solar cell and module performance on temperature and irradiance is essential for their optimal application in the field. Here we study such dependencies in the most common high-efficiency silicon solar cell architectures, including so-called Aluminum back-surface-field (BSF), passivated emitter and rear cell (PERC), passivated emitter rear totally diffused (PERT), and silicon heterojunction (SHJ) solar cells. We compare measured temperature coefficients (TC) of the different electrical parameters with values collected from commercial module data sheets. While similar TC values of the open-circuit voltage and the short circuit current density are obtained for cells and modules of a given technology, we systematically find that the TC under maximum power-point (MPP) conditions is lower in the modules. We attribute this discrepancy to additional series resistance in the modules from solar cell interconnections. This detrimental effect can be reduced by using a cell design that exhibits a high characteristic load resistance (defined by its voltage-over-current ratio at MPP), such as the SHJ architecture. We calculate the energy yield for moderate and hot climate conditions for each cell architecture, taking into account ohmic cell-to-module losses caused by cell interconnections. Our calculations allow us to conclude that maximizing energy production in hot and sunny environments requires not only a high open-circuit voltage, but also a minimal series-to-load-resistance ratio.

Large-Area n-Type PERT Solar Cells Featuring Rear p + Emitter Passivated by ALD Al 2 O 3

We present large-area n-type PERT solar cells featuring a rear boron emitter passivated by a stack of ALD Al₂O₃ and PECVD SiO_x. After illustrating the technological and fundamental advantages of such a device architecture, we show that the Al₂O₃/SiO_x stack employed to passivate the boron emitter is unaffected by the rear metallization processes and can suppress the Shockley-Read-Hall surface recombination current to values below 2 fA/cm², provided that the Al₂O₃ thickness is larger than 7 nm. Efficiencies of 21.5% on 156-mm commercial-grade Cz-Si substrates are demonstrated in this study, when the rear Al₂O₃ /SiO_x passivation is applied in combination with a homogeneous front-surface field (FSF). The passivation stack developed herein can sustain cell efficiencies in excess of 22% and V_oc above 685 mV when a selective FSF is implemented, despite the absence of passivated contacts. Finally, we demonstrate that such cells do not suffer from light-induced degradation.

Oxidation enhanced diffusion for screen printed silicon solar cells

If the worlds answer to alternative energy production is to be silicon photovoltaics, the fabricated devices need to be produced with the lowest dollar per watt peak. This may be translated to a high efficiency at competitive costs. An easily implementable approach to increase solar cell efficiency without incurring too much cost is to include thermal oxidation [1,2,3,4]. Thermally grown silicon oxide is well known in the microelectronics industry as one of the best dielectrics to passivate silicon surfaces. This paper will focus on two simultaneous properties related to thermal oxidation. The first is the phosphorus emitter and how it can be significantly altered even at low temperatures (800C). The second is passivation due to the thermal oxidation of both front and rear surfaces. A 60 and an 80 Ω/□ emitter (compatible with silver screen printed contact formation) will be investigated with various oxidation conditions using secondary ions mass spectroscopy (SIMS), scanning spreading resistance (SRP), emitter saturation currents (Joe) as well as final solar cell devices. We report that increasing oxidation significantly decreases phosphorus surface concentration (Ns) while increasing junction depth. The final cell results show that increasing oxidation increases both open circuit voltage (Voc) as well as fill factor (FF), however the current density (Jsc) is reduced partly due to front reflection loss. The cells studied in this paper are fabricated on 149cm2, 155μm thin 1.5 ohm.cm p-type Cz-Si wafers that have screen printed Ag front contacts and a thin thermal oxide on both sides with a rear deposited oxide/nitride stack The highest confirmed efficiency of the cells studied is 19.9% with a Voc of 654mV, Jsc of 38.4 mA/cm2 and a fill factor of 79.3%.

Kerfless Epitaxial Mono Crystalline Si Wafers With Built-In Junction and From Reused Substrates for High-Efficiency PERx Cells

This paper proposes a kerfless wafer structure with built-in p-n junctions in n-type silicon wafers grown using Crystal Solars high throughput epitaxy technology. Compared with a conventional p-type emitter by boron diffusion, ion implantation, or epitaxy, the built-in p-type emitter has a reduced and uniform doping concentration and increased thickness. The epitaxially grown wafers and conventional Czochralski (CZ) n-type wafers were processed into solar cells. A best efficiency of 22.5% with epitaxially grown wafers was achieved, with a 6 mV gain in open-circuit voltage, suggesting a high wafer quality and superiority of the deep epitaxial emitter over a standard boron-diffused emitter. Substrate reuse associated with the kerfless epitaxy technology is studied as well, with respect to its impact on solar cell efficiency. The data suggest no degradation in cell efficiency due to substrate reuse.