Paolo Colantonio

A Design Technique for Concurrent Dual-Band Harmonic Tuned Power Amplifier

In this paper, a novel technique to design concurrent dual-band high-efficiency harmonic tuned (HT) power amplifiers (PAs) is presented. The proposed approach is based on a methodology developed to design multifrequency passive matching networks, which allows concurrent operability. The network design criterion is heavily investigated and later generalized both from the theoretical and practical point of view. The design, realization, and the complete characterization of a concurrent dual-band high-efficiency HT PA is finally described. A 1-mm gate periphery GaN HEMT device was used for the design and realization of the PA operating concurrently at 2.45 and 3.3 GHz. The measurement results have shown 53% and 46% drain efficiency at 33- and 32.5-dBm output power in the two targeted bands if operated in continuous wave single mode. In concurrent mode, 35% average efficiency was achieved with two simultaneously applied orthogonal frequency-division multiplexing signals.

Design of a Concurrent Dual-Band 1.8–2.4-GHz GaN-HEMT Doherty Power Amplifier

In this paper, the design, implementation, and experimental results of a high-efficiency dual-band GaN-HEMT Doherty power amplifier (DPA) are presented. An extensive discussion about the design of the passive structures is presented showing different possible topologies of the dual-band DPA. One of the proposed topologies is used to design a dual-band DPA in hybrid technology for the frequency bands 1.8 and 2.4 GHz with the second efficiency peak at 6-dB output power back-off (OBO). For a continuous-wave output power of 20 W, the measured power-added efficiency (PAE) is 64% and 54% at 1.8 and 2.4 GHz, respectively. At -dB OBO, the resulting measured PAEs were 60% and 44% in the two frequency bands. Linearized concurrent modulated measurement using 10-MHz LTE signal with 7-dB peak-to-average-ratio (PAR) at 1.8 GHz and 10-MHz WiMAX signal with 8.5-dB PAR at 2.4 GHz shows an average PAE of 34%, at an adjacent channel leakage ratio of -48 dBc and -46 dBc at 1.8 and 2.4 GHz, respectively.

An approach to harmonic load- and source-pull measurements for high-efficiency PA design

High-efficiency power-amplifier design requires numerous efforts to investigate both input and output harmonic terminations effects. A simplified theoretical approach to clarify the relevance of such terminations is presented here, and design criteria to improve efficiency for high-frequency applications are briefly discussed. An advanced active load/source-pull test-bench has been used to validate theoretical harmonic tuning techniques, characterizing an active device. The adopted optimization strategy is presented, together with measured results obtained with a medium-power 1-mm MESFET at 1 GHz. Input second harmonic impedances effects are stressed, showing a drain efficiency spread between 37%-49% for a fixed input power level, corresponding to 1-dB compression. Finally, as predicted by the presented theory, after input second harmonic tuning, further improvements are obtained, increasing fundamental output load resistive part, demonstrating an additional drain efficiency enhancement, which reaches a level of 55% at 1-dB compression.

A C-band high-efficiency second-harmonic-tuned hybrid power amplifier in GaN technology

In this contribution, a C-band 2nd harmonic tuned hybrid power amplifier utilizing a PHEMT GaN device is presented, together with technological aspects, nonlinear device model and adopted design criteria. The amplifier has been realised in hybrid form, exhibiting a bandwidth larger than 20% around 5.5GHz, with a minimum output power of 33 dBm, and a drain efficiency of 60% at the centre frequency.

Theory and Experimental Results of a Class F AB-C Doherty Power Amplifier

The aim of this paper is to present a closed-form formulation suitable for a direct computer-aided design synthesis of a Doherty amplifier employing a Class F design strategy for the Main (or Carrier) device. For this purpose, starting from a simplified model for the adopted active devices, the behavioral analysis of the Class F Doherty amplifier is carried out as a function of the input signal. A particular emphasis is dedicated to put into evidence the differences existing when a simple tuned load harmonic termination is considered. The theoretical aspects are deeply discussed and an experimental validation is also provided.

A Doherty Architecture With High Feasibility and Defined Bandwidth Behavior

This paper presents a complete and rigorous theoretical investigation of a Doherty architecture with a novel output combining network. The benefits in terms of bandwidth and feasibility held by the proposed topology are investigated and compared with the conventional one. In particular, the theoretical analysis demonstrates that the proposed output combiner allows to implement a Doherty amplifier with defined bandwidth (narrower or broader) without worsening in performances. Moreover, the proposed solution results in a more feasible structure with respect to the classical one, especially when high output power levels are sought. The theoretical results are validated through the design and realization of a prototype based on commercial GaN active devices. Experimental results show 42-dBm output power and 65% peak efficiency with a flat behavior in the 1.95-2.25-GHz frequency band (i.e., 14% of relative bandwidth) under continuous wave signal. Moreover, 50% average efficiency at 38-dBm average output power with -45 dBc of adjacent channel power ratio is demonstrated under 5-MHz 3GPP driving signal using a simple polynomial digital pre-distortion.

A Closed-Form Design Technique for Ultra-Wideband Doherty Power Amplifiers

This paper presents an innovative architecture to drastically enlarge the bandwidth of the Doherty power amplifier (DPA). The proposed topology, based on novel input/output splitting/combining networks, allows to overcome the typical bandwidth limiting factors of the conventional DPA. A complete and rigorous theoretical investigation of the developed architecture is presented leading to a closed-form formulation suitable for a direct synthesis of ultra-wideband DPAs. The theoretical formulation is validated through the design, realization, and test of a hybrid prototype based on commercial GaN HEMT device showing a fractional bandwidth larger than 83%. From 1.05 to 2.55 GHz, experimental results with continuous-wave signals have shown efficiency levels within 83%-45% and within 58%-35% at about 42- and 36-dBm output power, respectively. The DPA has also been tested and digitally predistorted by using a 5-MHz Third Generation Partnership Project (3GPP) signal. In particular, to evaluate the ultra-wideband and the multi-mode capabilities of the prototype, f1 = 1.2 GHz, f2 = 1.8 GHz, and f3 = 2.5 GHz have been selected as carrier frequencies for the 3GPP signal. Under these conditions and at 36-dBm average output power, the DPA shows 52%, 35%, and 52% efficiency and an adjacent channel power ratio always lower than -43 dBc.

A Wideband Doherty Architecture With 36% of Fractional Bandwidth

This letter presents the design and characterization of a novel wideband Doherty architecture. Both input splitter and output combiner are realized by means of two-sections branch-line alike couplers. The realized prototype based on commercial GaN active devices shows more than 36% of fractional bandwidth, from 1.67 to 2.41 GHz. In this frequency range, the measured drain efficiency is within 59% and 43% at 6 dB of output power back-off and within 72% and 53% at saturation, with an output power around 41 dBm. More than 47% average efficiency and less than -40 dBc adjacent channel power ratio are measured applying a 20 MHz LTE digitally pre-distorted signal when the average output power is around 4 W.

Increasing Doherty Amplifier Average Efficiency Exploiting Device Knee Voltage Behavior

This contribution presents the theoretical analysis and design guidelines to increase the average efficiency of a Doherty power amplifier (DPA), accounting for the device on-resistance. Starting from a simplified device model, closed-form equations for the estimation of both design parameters and obtainable performances are reported. Moreover, advantages and disadvantages of the approach are deeply investigated through a comparison with the standard implementation of a DPA, i.e., based on constant knee voltage behavior. Finally, as experimental support for the developed theoretical analysis, two X-band monolithic microwave integrated circuit DPAs, based on the same GaAs technology, have been designed, realized, and tested. The first one was based on the standard methodology, while the other one has been optimized exploiting the device knee voltage behavior. Measurement results validated the developed analysis, confirming what is theoretically expected for the main DPA features. In particular, both DPAs have 29 dBm of output power with 7.2 dB of power gain in 6 dB of output power back-off (OBO). The efficiency is larger than 35% for the standard DPA and 42% for the one designed exploiting the device on-resistance, in the same OBO region.

A 6W Uneven Doherty Power Amplifier in GaN Technology

In this paper the design of a 6W uneven GaN Doherty power amplifier is presented. The Doherty PA is designed to achieve high efficiency for modulated signals with high peak to average power ratio used in modern wireless communication systems. The Doherty amplifier has been designed using two equal sized GaN devices for the main class AB and peaking class C amplifiers. An uneven power divider is used at the input to deliver more input power to the peaking amplifier than the main amplifier. The measured maximum output power of the realised uneven Doherty is 38 dBm with 60% of peak power added efficiency (76% of drain efficiency). The power added (drain) efficiency is higher than 52% (62%) up to 6 dB of back off, or 42% (45%) up to 10 dB of back off.