Pascal Nouet

Characterization of the transient behavior of gated/STI diodes and their associated BJT in the CDM time domain

A measurement setup for the characterization of very fast transient responses in the CDM time domain is described in this paper. Experimental results are demonstrated on STI and gated diodes with a guard ring in a 65 nm and 130 nm CMOS technology. The superior behavior of gated diodes during triggering is highlighted.

A low power interface circuit for resistive sensors with digital offset compensation

This paper presents an innovative conditioning and read-out interface for resistive MEMS sensors. The proposed structure includes a digital offset compensation for robustness to process and temperature variations. Simulation results demonstrate an impressive resolution to power consumption ratio and a good immunity to environmental parameters. Experimental results finally demonstrate the efficiency of this promising read-out architecture.

Evaluation of the oscillation-based test methodology for micro-electro-mechanical systems

In this paper, Oscillation-based Test Methodology (OTM) is evaluated in the context of MEMS testing. Both qualitative and quantitative evaluations of fault coverage are discussed and the impact of test on production yield is addressed. This article also introduces the Lorentz force as a low-cost stimulus for electro-mechanical structures.

A Fully Integrated Inertial Measurement Unit: Application to Attitude and Heading Determination

This paper introduces the monolithic association of five sensors in an Inertial Measurement Unit (IMU). Two thermal accelerometers, two piezoresistive magnetometers, and one seismic accelerometer have been co-integrated using two different industrial processes thus demonstrating the versatility of the proposed solution. The first prototype is a System in Package (SiP) with signal processing on a separate die, while the second prototype is a full-CMOS System on Chip (SoC). The proposed architecture is detailed including the front-end electronics which is optimized to address noise and power consumption issues. Based on characterization results, good resolutions are obtained for each sensing axis. Using these results, the IMU is evaluated in the context of an Attitude and Heading Reference System (AHRS). Results demonstrate the suitability of the proposed five axis architecture, for full 3D orientation determination, with acceptable resolutions.

Modeling the influence of etching defects on the sensitivity of MEMS convective accelerometers

In this paper, a behavioral model that includes the influence of etching defects on the sensitivity of MEMS convective accelerometers is presented. Starting from an existing behavioral model, new physically-based expressions have been derived to introduce etching defects in the simulation of thermal conduction in the sensor. In addition, a semi-empirical model has been introduced for thermal convection. Finally, a very good agreement is obtained between the behavioral model and FEM simulations.

Use of test structures for characterization and modeling of inter- and intra-layer capacitances in a CMOS process

In this paper, we present a global approach for inter- and intralayer capacitance characterization and modeling. Using an accurate on-chip measurement method, we have characterized realistic test patterns, i.e., test patterns consistent with capacitive couplings encountered in a layout. These reference values have allowed us to point out some limitations of current models and to propose new simple analytical models suitable for small dimension capacitive patterns. This paper emphasizes inter- and intralayer modeling.

A novel method for test and calibration of capacitive accelerometers with a fully electrical setup

Test and calibration cost is a bottleneck to reduce the overall production cost of MEMS sensors. One main reason is the cost of generating non electrical test stimuli. Hence, replacing the functional multi-domain test equipments with electrical ones arouses interest. The focus of this paper is on sensitivity testing and calibration through fully electrical measurements. A new method based on analytical expressions of the sensitivity with respect to both physical parameters of the structure and electrical test parameters is proposed The accuracy of the method is evaluated by mean of a high level model including global and intra-die mismatch variations. It is shown that an accurate estimation of the sensitivity can be achieved using only electrical measurements and that the dispersions on the sensitivity can be divided by about 7 after the calibration procedure. These results are promising enough for high volume production of low-cost sensors.

A dependable microelectronic peptide synthesizer using electrode data

The research in the area of microelectronic fluidic devices for biomedical applications is rapidly growing. As faults in these devices can have serious personal implications, a system is presented which includes fault tolerance with respect to the synthesized biomaterials (peptides). It can employ presence and purity detection of peptide droplets via current (charge) tests of control electrodes or impedance (phase) measurements using direct sensing electrodes near the peptide collector area. The commercial multielectrode array performs better in pure and impure detection of peptides in impedance and phase. Our two-electrode X-MEF case shows slightly poorer results. In both cases the phase is the best choice for contents detection. If there are presence or purity problems, the location is marked, and repeated peptide synthesis at another collector site is initiated.

Test and Testability of a Monolithic MEMS for Magnetic Field Sensing

This paper addresses MEMS testing through a case study: a micromachined magnetic field sensor with on-chip electronics. The sensor element is based on a cantilever beam that is deflected by means of the Lorentz force. Embedded piezoresistors are used to detect strain in the cantilever beam and thus to detect the magnetic field. A test approach is presented for the whole system focussing on fault classification, on design for testability and on production test costs. Fault classification introduces several catastrophic and parametric faults on both mechanical and electrical elements. Simple and low-cost design for testability such as test point insertion is then discussed for test cost reduction and for fault coverage enhancement.

Integrated Circuits Testing: Remote Access to Test Equipment for Labs and Engineering

This paper concerns the local and remote use of an Integrated Circuits (IC) Automated Test Equipment (ATE) for both educational and engineering purposes. This experience was initiated in 1998 in the context of a French network (CNFM) in order to provide a distant control to industrial equipment for academic and industrial people. The actual shared resource is a Verigy V93K System on Chip (SoC) tester platform. The cost of such an equipment is close to 1Mâ?¬, without taking into account the maintenance and attached human resources expenses to make it work properly daily. Although the sharing of this equipment seems to be obvious for education, the French experience is quite a unique example in the world. Here, practical information regarding IC testing and network setup for remote access are detailed, together with the associated training program.