Paul Kaufmann

Fluctuating emg signals: Investigating long-term effects of pattern matching algorithms

In this paper, we investigate the behavior of state-of-the-art pattern matching algorithms when applied to electromyographic data recorded during 21 days. To this end, we compare the five classification techniques k-nearest-neighbor, linear discriminant analysis, decision trees, artificial neural networks and support vector machines. We provide all classifiers with features extracted from electromyographic signals taken from forearm muscle contractions, and try to recognize ten different hand movements. The major result of our investigation is that the classification accuracy of initially trained pattern matching algorithms might degrade on subsequent data indicating variations in the electromyographic signals over time.

Comparing Evolvable Hardware to Conventional Classifiers for Electromyographic Prosthetic Hand Control

Evolvable hardware has shown to be a promising approach for prosthetic hand controllers as it features self-adaptation, fast training, and a compact system-on-chip implementation. Besides these intriguing features, the classification performance is paramount to success for any classifier. However, evolvable hardware classifiers have not yet been sufficiently compared to state-of-the-art conventional classifiers. In this paper, we compare two evolvable hardware approaches for signal classification to three conventional classification techniques: k-nearest-neighbor, decision trees, and support vector machines. We provide all classifiers with features extracted from electromyographic signals taken from forearm muscle contractions, and try to recognize eight different hand movements. Experimental results demonstrate that evolvable hardware approaches are indeed able to compete with state-of-the-art classifiers. Specifically, one of our evolvable hardware approaches delivers a generalization performance similar to that of support vector machines.

EvoCaches: Application-specific Adaptation of Cache Mappings

In this work we present EvoCache, a novel approach for implementing application-specific caches. The key innovation of EvoCache is to make the function that maps memory addresses from the CPU address space to cache indices programmable. We support arbitrary Boolean mapping functions that are implemented within a small reconfigurable logic fabric. For finding suitable cache mapping functions we rely on techniques from the evolvable hardware domain and utilize an evolutionary optimization procedure. We evaluate the use of EvoCache in an embedded processor for two specific applications (JPEG and BZIP2 compression) with respect to execution time, cache miss rate and energy consumption. We show that the evolvable hardware approach for optimizing the cache functions not only significantly improves the cache performance for the training data used during optimization, but that the evolved mapping functions generalize very well. Compared to a conventional cache architecture, EvoCache applied to test data achieves a reduction in execution time of up to 14.31% for JPEG (10.98% for BZIP2), and in energy consumption by 16.43% for JPEG (10.70% for BZIP2). We also discuss the integration of EvoCache into the operating system and show that the area and delay overheads introduced by EvoCache are acceptable.

Advanced techniques for the creation and propagation of modules in cartesian genetic programming

The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, which encodes an array of logic gates into a chromosome. While several smaller circuits have been successfully evolved on this model, it lacks scalability. A recent approach towards scalable hardware evolution is based on the automated creation of modules from primitive gates. In this paper, we present two novel approaches for module creation, an age-based and a cone-based technique. Further, we detail a cone-based crossover operator for use with cartesian genetic programming. We evaluate the different techniques and compare them with related work. The results show that age-based module creation is highly effective, while cone-based approaches are only beneficial for regularly structured, multiple output functions such as multipliers.

Toward self-adaptive embedded systems: multi-objective hardware evolution

Evolutionary hardware design reveals the potential to provide autonomous systems with self-adaptation properties. We first outline an architectural concept for an intrinsically evolvable embedded system that adapts to slow changes in the environment by simulated evolution, and to rapid changes in available resources by switching to preevolved alternative circuits. In the main part of the paper, we treat evolutionary circuit design as a multi-objective optimization problem and compare two multi-objective optimizers with a reference genetic algorithm. In our experiments, the best results were achieved with TSPEA2, an optimizer that prefers a single objective while trying to maintain diversity.

MOVES: A Modular Framework for Hardware Evolution

In this paper, we present a framework that supports experimenting with evolutionary hardware design. We describe the frameworks modules for composing evolutionary optimizers and for setting up, controlling, and analyzing experiments. Two case studies demonstrate the usefulness of the framework: evolution of hash functions and evolution based on pre-engineered circuits.

A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms

Monitoring applications at run-time and evaluating the recorded statistical data of the underlying micro architecture is one of the key aspects required by many hardware architects and system designers as well as high-performance software developers. To fulfill this requirement, most modern CPUs for High Performance Computing have been equipped with Performance Monitoring Units (PMU) including a set of hardware counters, which can be configured to monitor a rich set of events. Unfortunately, embedded and reconfigurable systems are mostly lacking this feature. Towards rapid exploration of High Performance Embedded Computing in near future, we believe that supporting PMU for these systems is necessary. In this paper, we propose a PMU infrastructure, which supports monitoring of up to seven concurrent events. The PMU infrastructure is implemented on an FPGA and is integrated into a LEON3 platform.We show also the integration of our PMU infrastructure with the perf_event, which is the standard PMU architecture of the Linux kernel.

A Comparison of Evolvable Hardware Architectures for Classification Tasks

We analyze and compare four different evolvable hardware approaches for classification tasks: An approach based on a programmable logic array architecture, an approach based on two-phase incremental evolution, a generic logic architecture with automatic definition of building blocks, and a specialized coarse-grained architecture with pre-defined building blocks. We base the comparison on a common data set and report on classification accuracy and training effort. The results show that classification accuracy can be increased by using modular, specialized classifier architectures. Furthermore, function level evolution, either with predefined functions derived from domain-specific knowledge or with functions that are automatically defined during evolution, also gives higher accuracy. Incremental and function level evolution reduce the search space and thus shortens the training effort.

Optimizing the generator start-up sequence after a power system blackout

The restoration process of a power system after a blackout consists of three phases, namely starting up the generators, re-energizing the network, and picking the loads. The generator start-up sequence is pivotal for the total restoration time and the following restoration steps. In this paper, a novel algorithm for optimizing a generator start-up sequence is proposed. Based on the VIKOR method, which is a multi-objective approach, the proposed algorithm is not only able to improve the start-up time and reliability of a generator start-up sequence, but can also handle auxiliary optimization criteria with priorities that change during the start-up. Such criteria are, for instance, the importance of the power increasing rate, reliability and surrounding topologies of generators. The efficiency of the proposed method is evaluated in two tests. In the first test exhaustive search is used to compute optimal solutions. In the second and larger test NSGA-II is utilized to approximate the Pareto frontier. For both tests the proposed algorithm approximates the reference results while being computationally very efficient. This makes it suitable for online decision making where a new startup sequence has to be computed in a few seconds or minutes.

Classification of Electromyographic Signals: Comparing Evolvable Hardware to Conventional Classifiers

Evolvable hardware (EHW) has shown itself to be a promising approach for prosthetic hand controllers. Besides competitive classification performance, EHW classifiers offer self-adaptation, fast training, and a compact implementation. However, EHW classifiers have not yet been sufficiently compared to state-of-the-art conventional classifiers. In this paper, we compare two EHW approaches to four conventional classification techniques: k-nearest-neighbor, decision trees, artificial neural networks, and support vector machines. We provide all classifiers with features extracted from electromyographic signals taken from forearm muscle contractions, and let the algorithms recognize eight to eleven different kinds of hand movements. We investigate classification accuracy on a fixed data set and stability of classification error rates when new data is introduced. For this purpose, we have recorded a short-term data set from three individuals over three consecutive days and a long-term data set from a single individual over three weeks. Experimental results demonstrate that EHW approaches are indeed able to compete with state-of-the-art classifiers in terms of classification performance.