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Featured researches published by Paul R. Beaudet.


Applied Optics | 1988

Optical processing with residue LED/LD lookup tables

Anastasios P. Goutzoulis; Edward C. Malarkey; D. K. Davies; Joe C. Bradley; Paul R. Beaudet

Position-coded modulo m lookup tables (LUTs) with gate complexities equal to m(2), 2m, and 4 radicalm are discussed. The design of practical miniaturized LUTs is described along with results obtained from a prototype 7 x 7 laser diode LUT. A factored m(2) LUT technique that achieves large dynamic range is presented. Several LUT performance issues are also discussed.


Applied Optics | 1986

Residue arithmetic techniques for optical processing of adaptive phased array radars

Paul R. Beaudet; Anastasios P. Goutzoulis; Edward C. Malarkey; Joe C. Bradley

Residue arithmetic techniques which can be implemented optically are investigated for applicability to adaptive phased array radar processors. It is shown that neither the bit-serial nor the bit-parallel convolutional methods can compete favorably with emerging digital electronic techniques but that specialized forms of residue arithmetic processors may hold great potential in this area. We present a brief review of the salient features of residue arithmetic and illustrate Gauss reduction of linear systems by a procedure that is amenable to optical implementation. We discuss the details of a direct algorithm based on Gram-Schmidt orthogonalization which allows solution of large linear systems in residue arithmetic without the excessive growth of the principal modulus that is usually encountered in this approach. A pipelined architecture for performing this algorithm is also described.


Optical Sensors and Electronic Photography | 1989

Time And Space Multiplexing Focal Plane Convolvers

Paul R. Beaudet

Two varieties of Focal Plane Convolvers have been fabricated; the time multiplexing and the space multiplexing focal plane convolvers. They extract spacial features of a scene using parallel processing procedures at the imaging detector array site. The detailed description and operation of these devices is described. The following related areas of technology are also discussed: o Double Correlated Double Sampling o CCD Charge Transport o Equal Variance Mapping o Charge Transport Efficiency o Spacial Convolution Operators o Uniformity Issues o Local Rotational Invariance o Other Devices on the Reticle


Optoelectronic Signal Processing for Phased-Array Antennas | 1988

Optical Adaptive Beamforming Using Residue Number Systems (RNSs) And Gauss Elimination

Paul R. Beaudet; Joe C. Bradley; Edward C. Malarkey

Optical look-up tables (LUTs) are used for solving the Adaptive Beamforming problem in a quadratic (Complex) Residue Number System, QRNS. It is shown that QRNS is isomorphic to the usual RNS arithmetic so that real moduli implementations can be used. In QRNS, a system of linear equations can appear singular when the determinant is a multiple of one of the moduli used in the representation. It is shown that this apparent singularity can be avoided and that the singular-like system of equation can be solved uniquely in spite of the apparent singularity. An example is given to illustrate the technique of solving singular-like QRNS systems of equations. The optical implementation of QRNS arithmetic uses Second Factorization which is shown to significantly reduce the number of optical components needed in the LUTs.


Optoelectronic Signal Processing for Phased-Array Antennas | 1988

Factored Look- Up Tables (Luts ) And Their Use In Residue Number System (Ens) Computations*

Edward C. Malarkey; Joe C. Bradley; Paul R. Beaudet

Optical LUTs were designed to perform algebraic operations in residue arithmetic. Also, a technique for factoring LUTs that significantly reduces the hardware and provides a second level of parallelism has been developed. This paper explains the notion of table factorization, illustrates it with an example and discusses the use made of it in solving linear algebraic equations.


Optoelectronic Signal Processing for Phased-Array Antennas | 1988

Modulo (6 +- 5i) Inner Product Computer

Gary E. Marx; Paul R. Beaudet; Joe C. Bradley; Edward C. Malarkey; J D. Fogerty; D W. Beuerle; B W. Skelly

A Residue Number System (RNS) modulo (6+5i) multiplier/accumulator computer utilizing factored look-up tables (LUTs) is presented. The inner product computer computes the inner product of two n dimensional complex integer vectors. The general features of the 200 MHz multiplier/accumulator is described. A discussion of the design of the inputs, the multiplier, the accumulator, the optical fiber decoder interconnections and the distributed clock is included. An architecture is given as an example. Finally, a fabricated modulo (6 + Si) multiplier (photo included) is described which demonstrates the validity of the concept.


Proceedings of SPIE | 1992

Optically implemented residue-number-system processing for large-order systems

D. Mergerian; Edward C. Malarkey; Joe C. Bradley; Hyo-Kun Hahn; Paul R. Beaudet; Gary E. Marx; J. Gonella; J. L. Gleich; James Davis

Two techniques developed during recent years have significantly enhanced the capabilities of residue-number-system (RNS) based processors to meet the demanding requirements of large- order systems. First, a method of factoring the prime modular subprocessor allows a major reduction in the componentry required to implement a look-up-table (LUT) based processor. Secondly, the use of CORE functions permits a drastic reduction in the number and magnitude of prime moduli required when the processor is applied in the solution of problems with many degrees of freedom. This paper will discuss the use of RNS-based processors in the solution of adaptive antenna problems, the basic drawbacks and the manner in which factored LUTs and CORE functions circumvent these drawbacks.


Optoelectronic Signal Processing for Phased-Array Antennas II | 1990

Optical adaptive processors for large-order problems

Joe C. Bradley; Paul R. Beaudet; Edward C. Malarkey; Hyo-Kun Hahn; J. H. Mims

The problem of determining complex weights appropriate for adaptive beam nulling is discussed in the setting of a residue number system. Algorithms available for residue number system processing that allow scaling and are extendable to large order systems (i.e., as large as 64) include Gauss elimination, the modified Cholesky method and the Gram-Schmidt method. The most appropriate of these from the standpoint of complexity is the modified Cholesky method.


OE/LASE '90, 14-19 Jan., Los Angeles, CA | 1990

Residue-number-system-based optical adaptive processor architecture

Edward C. Malarkey; Joe C. Bradley; Paul R. Beaudet; Gary E. Marx; D. Mergerian

An architecture for an optically implemented adaptive array processor which operates in quadratic residue number systems (QRNS) is presented. The unit provides four adaptive degrees of freedom but can be expanded, through additional modular processing elements, to 12 or more degrees. Separate subprocessors construct a sample covariance matrix and solve for the complex weights via Gauss elimination and back substitution. A third subprocessor performs scaling and integer reconstruction operations through mixed radix conversion (MRC). The system uses optical clocking to operate at an internal rate of 200 MHz, and it will produce complete weight solutions approximately once per microsecond with a total latency of about 2.3 psec.


military communications conference | 1989

Residue-number-system-based optical adaptive processor

Edward C. Malarkey; Gary E. Marx; J.D. Fogarty; D. Mergerian; Hyo-Kun Hahn; Joe C. Bradley; Paul R. Beaudet; R. Fenton

An optical adaptive processor with 4 degrees of freedom is under development. This processor is based upon the use of optical lookup tables and operates within the residue number system to provide adaptive tap weights for nulling applications. The basic processor architecture is described, along with design and experimental details on the lookup tables and optical interconnections among them. Some results of simulations are presented. Also considered is the development of the modulo 61 M/A (multiplier-accumulator) board, a basic building block in the processor.<<ETX>>

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