Pavel Izikson

Optimized overlay metrology marks: theory and experiment

In this paper, we provide a detailed analysis of overlay metrology mark and find the mapping between various properties of mark patterns and the expected dynamic precision and fidelity of measurements. We formulate the optimality criteria and suggest an optimal overlay mark design in the sense of minimizing the Cramer-Rao lower bound on the estimation error. Based on the developed theoretical results, a new overlay mark family is proposed-the grating marks. A thorough testing performed on the new grating marks shows a strong correlation with the underlying theory and demonstrate the superior quality of the new design over the overlay patterns used today.

Differential signal scatterometry overlay metrology: an accuracy investigation

The overlay control budget for the 32nm technology node will be 5.7nm according to the ITRS. The overlay metrology budget is typically 1/10 of the overlay control budget resulting in overlay metrology total measurement uncertainty (TMU) requirements of 0.57nm for the most challenging use cases of the 32nm node. The current state of the art imaging overlay metrology technology does not meet this strict requirement, and further technology development is required to bring it to this level. In this work we present results of a study of an alternative technology for overlay metrology - Differential signal scatterometry overlay (SCOL). Theoretical considerations show that overlay technology based on differential signal scatterometry has inherent advantages, which will allow it to achieve the 32nm technology node requirements and go beyond it. We present results of simulations of the expected accuracy associated with a variety of scatterometry overlay target designs. We also present our first experimental results of scatterometry overlay measurements, comparing this technology with the standard imaging overlay metrology technology. In particular, we present performance results (precision and tool induced shift) and address the issue of accuracy of scatterometry overlay. We show that with the appropriate target design and algorithms scatterometry overlay achieves the accuracy required for future technology nodes.

Optimization of High Order Control including overlay, alignment and sampling

Overlay requirements for semiconductor devices are increasing faster than anticipated. Overlay becomes much harder to control with current methods and therefore novel techniques are needed. In this paper, we present our investigation methods for High Order Control, and the candidates for improvement. This paper will present the study for each components of high order control. High order correction is one component for high order control and several correction methods were compared for this study. High order alignment is another important component for higher order control instead of using conventional linear model for the alignment. Alignment and overlay measurement sampling decision becomes a more critical issue for sampling efficiency and accuracy. Optimal sampling for high order was studied for high order control. Using all these studies, various applications for optimal high order control have also been studied. This study will show the general approach for high order control with theory and actual experimental data.

AIM technology for Non-Volatile Memories microelectronics devices

Accurate and precise overlay metrology is a critical requirement in order to achieve high product yield in microelectronic manufacturing. Meeting the tighter overlay measurement error requirements for 90nm technology and beyond is a dramatic challenge for optical metrology techniques using only conventional overlay marks like Bar in Bar (BiB) or Frame in Frames (FiF). New deficiencies, affecting traditional overlay marks, become evident as microlithography processes are developed for each new design rule node. The most serious problems are total measurement uncertainty, CMP process robustness, and device correlation. In this paper we will review the superior performances of grating-based AIM marks to provide a complete solution to control lithography overlay errors for new generation devices. Examples of successful application of AIM technology to FEOL and Cu-BEOL process steps of advanced non volatile memory devices manufacturing are illustrated. An additional advantage of the adoption of AIM marks is that the significant reduction of target noise versus conventional marks revealed systematic differences within the lithography cluster which were previously obscure offering a new tool to optimize litho cells. In this paper we demonstrated that AIM target architecture enables high performance metrology with design rule segmented targets - a prerequisite to have overlay marks fully compatible with design rule sensitive process steps.

Target noise in overlay metrology

We have developed a method for calculating the statistical effects of spatial noise on the overlay measurement extracted from a given overlay target. The method has been applied to two kinds of overlay targets on three process layers, and the new metric, Target Noise, has been shown to correlate well to the random component of Overlay Mark Fidelity. A significant difference in terms of robustness has been observed between AIM targets and conventional Frame-in-Frame targets. The results fit well into the spatial noise hierarchy presented in this paper.

Improved overlay control using robust outlier removal methods

Overlay control is one of the most critical areas in advanced semiconductor processing. Maintaining optimal product disposition and control requires high quality data as an input. Outliers can contaminate lot statistics and negatively impact lot disposition and feedback control. Advanced outlier removal methods have been developed to minimize their impact on overlay data processing. Rejection methods in use today are generally based on metrology quality metrics, raw data statistics and/or residual data statistics. Shortcomings of typical methods include the inability to detect multiple outliers as well as the unnecessary rejection of valid data. As the semiconductor industry adopts high-order overlay modeling techniques, outlier rejection becomes more important than for linear modeling. In this paper we discuss the use of robust regression methods in order to more accurately eliminate outliers. We show the results of an extensive simulation study, as well as a case study with data from a semiconductor manufacturer.

Automated optimized overlay sampling for high-order processing in double patterning lithography

A primary concern when selecting an overlay sampling plan is the balance between accuracy and throughput. Two significant inflections in the semiconductor industry require even more careful sampling consideration: the transition from linear to high order overlay control, and the transition to dual patterning lithography (DPL) processes. To address the sampling challenges, an analysis tool in KT-Analyzer has been developed to enable quantitative evaluation of sampling schemes for both stage-grid and within-field analysis. Our previous studies indicated (1) the need for fully automated solutions that takes individual interpretation from the optimization process, and (2) the need for improved algorithms for this automation; both of which are described here.

In-line focus-dose monitoring for hyper NA imaging

The merits of hyper NA imaging using 193nm exposure wavelength with water immersion for 45nm is clear. Scanner focus and dose control is always improving to allow small DOF manufacturing in immersion lithography. However, other process parameters can affect focus and dose control and a real-time monitor capability to detect local focus and exposure conditions on production wafers is required. In this paper we evaluated a focus-exposure monitor technique based on Spectroscopic Critical Dimension (SCD) metrology following the promising results obtained by Kelvin Hung [1] et al. The key attributes of this technique are the implementation on standard production wafers, the high sensitivity to pattern profile modifications and the unique capability of spectroscopic ellipsometry to provide all the information needed to decouple the effects on pattern formation coming from process variations of Advanced Patterning Films (APF) [2], largely adopted for 65/45nm patterning, from coating and, finally, from the pure scanner imaging contributors like focus and exposure. We will present the characterization of this technique for 2 critical layers: active and contacts of a non-volatile memory device, 45nm technology.

Sampling for advanced overlay process control

Overlay metrology and control have been critical for successful advanced microlithography for many years, and are taking on an even more important role as time goes on. Due to throughput constraints it is necessary to sample only a small subset of overlay metrology marks, and typical sample plans are static over time. Standard production monitoring and control involves measuring sufficient samples to calculate up to 6 linear correctables. As design rules shrink and processing becomes more complex, however, it is necessary to consider higher order modeled terms for control, fault detection, and disposition. This in turn, requires a higher level of sampling. Due to throughput concerns, however, careful consideration is needed to establish a base-line sampling, and higher levels of sampling can be considered on an exception-basis based on automated trigger mechanisms. The goal is improved scanner control and lithographic cost of ownership. This study addresses tools for establishing baseline sampling as well as motivation and initial results for dynamic sampling for application to higher order modeling.

In-field overlay uncertainty contributors: a back end study

In this publication, the contributors to in-field overlay metrology uncertainty have been parsed and quantified on a back end process and compared with results from a previous front end study1. Particular focus is placed on the unmodeled systematics, i.e. the components which contribute to residuals in a linear model after removal of random errors. These are the contributors which are often the most challenging to quantify and are suspected to be significant in the model residuals. The results show that in both back and front end processes, the unmodeled systematics are the dominant residual contributor, accounting for 60 to 70% of the variance, even when subsequent exposures are on the same scanner. A higher order overlay model analysis demonstrates that this element of the residuals can be further dissected into correctible and non-correctible high order systematics. A preliminary sampling analysis demonstrates a major opportunity to improve the accuracy of lot dispositioning parameters by transitioning to denser sample plans compared with standard practices. Field stability is defined as a metric to quantify the field to field variability of the intrafield correctibles.