Pawel Szczepankowski
Gdańsk University of Technology
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Publication
Featured researches published by Pawel Szczepankowski.
international symposium on industrial electronics | 2011
Krzysztof Jakub Szwarc; Artur Cichowski; Janusz Nieznanski; Pawel Szczepankowski
A simple model is derived and verified for evaluating the effect of parasitic capacitances on the dead-time related voltage distortion in multilevel NPC voltage source inverters. The model permits well-defined and precise compensation of dead-time distortion, exhibiting meaningful improvement on compensation methods neglecting the effects of parasitic capacitances. A simple formula is given for evaluating the capacitances as serial / parallel connections of transistor capacitances and external capacitances (introduced by the cables and load).
international symposium on industrial electronics | 2010
Artur Cichowski; Slawomir Bujacz; Janusz Nieznanski; Pawel Szczepankowski
The aim of this paper is to present the method of sensorless startup of super high speed permanent magnet motor. Two types of control methods are taken into consideration. In the first part of the startup the current mode as a control strategy was used. In this article the mode of switching the control strategies from the current mode to the vector control is proposed. The extended Kalman filter (EKF) and the unscented Kalman filter (UKF) were used in the vector control for angular velocity estimation. There is also presented the influence of accuracy of the voltage distortion compensation on the control quality.
conference of the industrial electronics society | 2013
Pawel Szczepankowski; Janusz Nieznanskiy; Wojciech Sleszynski
The paper proposes a new three-dimensional space vector pulse-width modulation (3D-SVPWM) algorithm for multilevel four-leg converters. The proposed PWM duty cycle calculation is based on the shape functions of the three-dimensional tetrahedral finite elements. The algorithm ensures synthesis of accurate and undistorted output voltages even under significant imbalance or ripple in the DC-link voltages. At the same time, the algorithm has the ability to eliminate the possible imbalance in the DC-link voltages.
conference of the industrial electronics society | 2013
Pawel Szczepankowski; Janusz Nieznanski
The paper puts forth a novel idea for the computation of Nearest Three Virtual Space Vector Pulse Width Modulation for the three level NPC converters. The computations are based on the concept of final element shape function widely used in the domain of finite element analysis. The proposed approach significantly frees the computations from the use of trigonometric functions, which simplifies the computations and permits easier and more effective implementation of the modulation itself and the related functionalities, notably the neutral-point voltage balancing. The active balancing algorithm has no effect on the formation of the converter output voltage.
international conference on industrial technology | 2015
Artur Cichowski; Wojciech Sleszynski; Janusz Nieznanski; Pawel Szczepankowski
The paper presents a comprehensive approach to the compensation of the grid current distortion for shunt active power filter systems. Four different sources of current distortion are addressed: imperfect grid synchronization caused by the distortion in the grid voltages, time delays in the estimation of compensating currents and grid voltages, fluctuations of the dc bus voltage, and the distortion of inverter output voltages due to dead-time effects and related factors. The focus of the paper is on the assessment of the significance of the dead time compensation.
international conference on industrial technology | 2015
Víctor Miñambres-Marcos; Indrek Roasto; Pawel Szczepankowski; Enrique Romero-Cadaval; Dmitri Vinnikov; Fermín Barrero-González
This paper focuses on the implementation of power electronics algorithms in control platforms based on DSP-FPGA. Todays power electronics technology demands high power computation with high speed interfacing at the same time. The most popular configuration is a DSP for the former and a FPGA for the latter. The main goal of this work was to develop a generic control system for power electronics application, but it is explained for an active power electronic transformer, which will be an active player in the energy storage, management and production game in the smart grids. Thus, demands for the control system are high, so it is mandatory to have a reliable, fast and user friendly control algorithm basis. The control board (SH363) used in this work contains a SHARC ADSP21363 DSP and a CYCLONE II EP2C8F256I8N FPGA. FPGA as a system interface, critical and non-critical communications between DSP and FPGA, including synchronization, and DSP programming are detailed. Also, a PC interface has been developed for an easy debugging and future system management. The methods used to achieve the maximum loop control frequency and the issues found during the implementation are discussed. The performance of the control board of the active power electronic transformer is verified experimentally.
2013 International Conference-Workshop Compatibility And Power Electronics | 2013
Pawel Szczepankowski
This paper presents a new approach to duty cycle calculation in pulse width modulation for direct matrix converters. The essence of the proposed method is the use of elementary shape function of finite element. The algorithm for calculating the duty cycles was reduced to simple operations on the coordinates of input and output voltage vectors without trigonometric functions.
european conference on power electronics and applications | 2009
Slawomir Bujacz; Artur Cichowski; Pawel Szczepankowski; Janusz Nieznanski
international conference on power engineering, energy and electrical drives | 2013
Pawel Szczepankowski; Piotr Kolodziejek
Przegląd Elektrotechniczny | 2012
K. Szwarc; Artur Cichowski; Janusz Nieznanski; Pawel Szczepankowski