Per Ericsson

Properties of Al2O3-films deposited on silicon by atomic layer epitaxy

Abstract Al 2 O 3 -films deposited by atomic layer epitaxy onto silicon wafers were investigated structurally and electrically. A post-deposition anneal at 900°C resulted in a decrease in film thickness of about 10% and an increase in the index of refraction of about 3%. The densification did not significantly influence the breakdown fields which were in the range of 7–8 MV/cm, but reduced the leakage currents through the films by several orders of magnitude. Mobile charges and charge trapping were observed using the capacitance-voltage technique. The charging properties improved dramatically after the post-deposition anneal.

Low-cost far infrared bolometer camera for automotive use

A new low-cost long-wavelength infrared bolometer camera system is under development. It is designed for use with an automatic vision algorithm system as a sensor to detect vulnerable road users in traffic. Looking 15 m in front of the vehicle it can in case of an unavoidable impact activate a brake assist system or other deployable protection system. To achieve our cost target below €100 for the sensor system we evaluate the required performance and can reduce the sensitivity to 150 mK and pixel resolution to 80 x 30. We address all the main cost drivers as sensor size and production yield along with vacuum packaging, optical components and large volume manufacturing technologies. The detector array is based on a new type of high performance thermistor material. Very thin Si/SiGe single crystal multi-layers are grown epitaxially. Due to the resulting valence barriers a high temperature coefficient of resistance is achieved (3.3%/K). Simultaneously, the high quality crystalline material provides very low 1/f-noise characteristics and uniform material properties. The thermistor material is transferred from the original substrate wafer to the read-out circuit using adhesive wafer bonding and subsequent thinning. Bolometer arrays can then be fabricated using industry standard MEMS process and materials. The inherently good detector performance allows us to reduce the vacuum requirement and we can implement wafer level vacuum packaging technology used in established automotive sensor fabrication. The optical design is reduced to a single lens camera. We develop a low cost molding process using a novel chalcogenide glass (GASIR®3) and integrate anti-reflective and anti-erosion properties using diamond like carbon coating.

High signal-to-noise ratio quantum well bolometer materials

Novel single crystalline high-performance temperature sensing materials (quantum well structures) have been developed for the manufacturing of uncooled infrared bolometers. SiGe/Si and AlGaAs/GaAs quantum wells are grown epitaxially on standard Si and GaAs substrates respectively. The former use holes as charge carriers utilizing the discontinuities in the valence band structure, whereas the latter operate in a similar manner with electrons in the conduction band. By optimizing parameters such as the barrier height (by variation of the germanium/aluminium content respectively) and the fermi level Ef (by variation of the quantum well width and doping level) these materials provide the potential to engineer layer structures with a very high temperature coefficient of resistance, TCR, as compared with conventional thin film materials such as vanadium oxide and amorphous silicon. In addition, the high quality crystalline material promises very low 1/f-noise characteristics promoting an outstanding signal to noise ratio and well defined and uniform material properties, A comparison between the two (SiGe/Si and AlGaAs/GaAs) quantum well structures and their fundamental theoretical limits are discussed and compared to experimental results. A TCR of 2.0%/K and 4.5%/K have been obtained experimentally for SiGe/Si and AlGaAs/GaAs respectively. The noise level for both materials is measured as being several orders of magnitude lower than that of a-Si and VOx. These uncooled thermistor materials can be hybridized with read out circuits by using conventional flip-chip assembly or wafer level adhesion bonding. The increased bolometer performance so obtained can either be exploited for increasing the imaging system performance, i. e. obtaining a low NETD, or to reduce the vacuum packaging requirements for low cost applications (e.g. automotive).

High-performance long wave infrared bolometer fabricated by wafer bonding

A novel microbolometer with peak responsivity in the longwave infrared region of the electromagnetic radiation is under development at Sensonor Technologies. It is a focal plane array of pixels with a 25μm pitch, based on monocrystalline Si/SiGe quantum wells as IR sensitive material. The novelty of the proposed 3D process integration comes from the choice of several of the materials and key processes involved, which allow a high fill factor and provide improved transmission/absorption properties. Together with the high TCR and low 1/f noise provided by the thermistor material, they will lead to bolometer performances beyond those of existing devices. The thermistor material is transferred from the handle wafer to the read-out integrated circuit (ROIC) by wafer bonding. The low thermal conductance legs that connect the thermistor to the ROIC are fabricated prior to the transfer bonding and are situated under the pixel. Depending on the type of the transfer bonding used, the plugs connecting the legs to the thermistor are made before or after this bonding, resulting in two different configurations of the final structure. Using a low temperature oxide bonding and subsequent plugs formation result in through-pixel plugs. Pre-bonding plugs formation followed by thermo-compression bonding result in under-pixel plugs. The pixels are subsequently released by anhydrous vapor HF of the sacrificial oxide layer. The ROIC wafer containing the released FPAs is bonded in vacuum with a silicon cap wafer, providing hermetic encapsulation at low cost. Antireflection coatings and a thin layer getter are deposited on the cap wafer prior to bonding, ensuring high performance of the bolometer.

High-performance quantum-well silicon-germanium bolometers using IC-compatible integration for low-cost infrared imagers

This paper reports on the realization and characterization of the very first quantum-well (QW) mono-crystalline Si/SiGe 18×18 pixel infrared bolometer arrays that are manufactured using IC compatible heterogeneous 3D integration on fan-out wafers. This integration process enables bolometer materials on top of CMOS-based integrated circuits that can not be integrated with conventional monolithic deposition techniques. The manufactured bolometer arrays have a negative temperature coefficient of resistance (TCR) of 2.8%/K. Measurements of the 1/f noise showed a higher value than expected for the bolometers. This result can be compared to lower values of noise achieved for samples of the thermistor material and is believed to result from imperfect metal contacts.

CMOS-Integrated Si/SiGe Quantum-Well Infrared Microbolometer Focal Plane Arrays Manufactured With Very Large-Scale Heterogeneous 3-D Integration

We demonstrate infrared focal plane arrays utilizing monocrystalline silicon/silicon-germanium (Si/SiGe) quantum-well microbolometers that are heterogeneously integrated on top of CMOS-based electronic read-out integrated circuit substrates. The microbolometers are designed to detect light in the long wavelength infrared (LWIR) range from 8 to 14 μm and are arranged in focal plane arrays consisting of 384 × 288 microbolometer pixels with a pixel pitch of 25 μm × 25 μm. Focal plane arrays with two different microbolometer designs have been implemented. The first is a conventional single-layer microbolometer design and the second is an umbrella design in which the microbolometer legs are placed underneath the microbolometer membrane to achieve an improved pixel fill-factor. The infrared focal plane arrays are vacuum packaged using a CMOS compatible wafer bonding and sealing process. The demonstrated heterogeneous 3-D integration and packaging processes are implemented at wafer-level and enable independent optimization of the CMOS-based integrated circuits and the microbolometer materials. All manufacturing is done using standard semiconductor and MEMS processes, thus offering a generic approach for integrating CMOS-electronics with complex miniaturized transducer elements.

Low-cost uncooled microbolometers for thermal imaging

Cost efficient integration technologies and materials for manufacturing of uncooled infrared bolometer focal plane arrays (FPA) are presented. The technology platform enables 320x240 pixel resolution with a pitch down to 20 μm and very low NETD. A heterogeneous 3D MEMS integration technology called SOIC (Silicon-On-Integrated-Circuit) is used to combine high performance Si/SiGe bolometers with state-of-the-art electronic read-out-integrated-circuits. The SOIC integration process consists of: (a) Separate fabrication of the CMOS wafer and the MEMS wafer. (b) Adhesive wafer bonding. (c) Sacrificial removal of the MEMS handle wafer. (d) Via-hole etching. (e) Via formation and MEMS device definition. (f) Sacrificial etching of the polymer adhesive. We will present an optimized process flow that only contains dry etch processes for the critical process steps. Thus, extremely small, sub-micrometer feature sizes and vias can be implemented for the infrared bolometer arrays. The Si/SiGe thermistor is grown epitaxially, forming a mono-crystalline multi layer structure. The temperature coefficient of resistance (TCR) is primarily controlled by the concentration of Ge present in the strained SiGe layers. TCR values of more than 3%/K can be achieved with a low signal-to-noise ratio due to the mono-crystalline nature of the material. In addition to its excellent electrical properties, the thermistor material is thermally stable up to temperatures above 600 °C, thus enabling the novel integration and packaging techniques described in this paper. Vacuum sealing at the wafer level reduces the overall costs compared to encapsulation after die singulation. Wafer bonding is performed using a Cu-Sn based metallic bonding process followed by getter activation at ≥350 °C achieving a pressure in the 0.001 mbar range. After assembling, the final metal phases are stable and fully compatible with hightemperature processes. Hermeticity over the product lifetime is accomplished by well-controlled electro-deposition of metal layers, optimized bonding parameters and a suitable bond frame design.

Realisation of Large Area 3C-SiC MOSFETs

Lateral MOSFET devices with varying size from a single unit cell to 3x3 mm2 containing 1980 unit cells have been realised using two basic technologies; lateral trench MOSFET (LTMOS) with epitaxially grown source and drain, and lateral MOSFET with lightly doped drain (LDDMOS) having implanted source and drain regions. The LDDMOS devices had blocking capability of 100 V and the channel mobility in the range of 10 cm2/Vs in {-110} current flow direction and of 5 cm2/Vs in {110} current flow direction. The properties of both fabricated MOSFET types, LTMOS and LDDMOS, are dominated by a high density of interface states of the order of 1×1013 cm-2eV-1. Both the drain current and the leakage current scale linearly with the device size up to the maximum investigated device size of 3x3 mm2. No size limiting defects have been observed contrary to what is often the case in 4H-SiC material.

Toward 17µm pitch heterogeneously integrated Si/SiGe quantum well bolometer focal plane arrays

Most of todays commercial solutions for un-cooled IR imaging sensors are based on resistive bolometers using either Vanadium oxide (VOx) or amorphous Silicon (a-Si) as the thermistor material. Despite the long history for both concepts, market penetration outside high-end applications is still limited. By allowing actors in adjacent fields, such as those from the MEMS industry, to enter the market, this situation could change. This requires, however, that technologies fitting their tools and processes are developed. Heterogeneous integration of Si/SiGe quantum well bolometers on standard CMOS read out circuits is one approach that could easily be adopted by the MEMS industry. Due to its mono crystalline nature, the Si/SiGe thermistor material has excellent noise properties that result in a state-ofthe- art signal-to-noise ratio. The material is also stable at temperatures well above 450°C which offers great flexibility for both sensor integration and novel vacuum packaging concepts. We have previously reported on heterogeneous integration of Si/SiGe quantum well bolometers with pitches of 40μm x 40μm and 25μm x 25μm. The technology scales well to smaller pixel pitches and in this paper, we will report on our work on developing heterogeneous integration for Si/SiGe QW bolometers with a pixel pitch of 17μm x 17μm.

High-performance infrared micro-bolometer arrays manufactured using very large scale heterogeneous integration

This paper reports on the implementation and characterization of arrays of uncooled infrared bolometers containing mono-crystalline Si/SiGe quantum well (QW) thermistors. The bolometer arrays are integrated on silicon fan-out wafers using very-large scale heterogeneous integration that is compatible with standard CMOS wafers. Infrared bolometer arrays with 320×240 pixels and pixel pitches of 25 µm × 25 µm and 17 µm × 17 µm have been implemented, respectively.