Peter Winson

Math methods in transistor modeling: Condition numbers for parameter extraction

Condition numbers expressing the sensitivity of computed circuit element values to inaccuracies in S-parameter measurements are derived and evaluated for a standard small-signal MESFET model. The condition numbers shed light on the common difficulty experienced by transistor modelers in extracting accurate values for the input resistance. Other elements are also classified according to their sensitivity.

A table-based bias and temperature-dependent small-signal and noise equivalent circuit model

A new algorithm is presented for construction of an accurate table-based bias and temperature dependent FET small-signal and noise model. The algorithm provides orders of magnitude data reduction over the alternate approach of storing multiple S-parameter and noise parameter data files (to represent different bias and temperature conditions). The algorithm performs 2-D linear interpolation on a single stored data table to quickly produce accurate bias and temperature dependent model simulations.<<ETX>>

A table based bias and temperature dependent small signal and noise equivalent circuit model

A new algorithm is presented for construction of an accurate table-based bias and temperature dependent FET small-signal and noise model. The algorithm provides orders of magnitude data reduction over the alternate approach of storing multiple S-parameter and noise parameter data files (to represent different bias and temperature conditions). The algorithm performs 2-D linear interpolation on a single stored data table to quickly produce accurate bias and temperature dependent model simulations. >

A novel algorithm for bias-dependent cascode FET modeling

In this paper we present a novel algorithm for a flexible table-based, bias-dependent, small-signal cascode MESFET model. The model utilizes 2-port DC and RF characterizations of a single-gate, common-source MESFET in contrast to the typical 3-port characterization approach typically applied to dual-gate and cascode FETs. Cascode FET simulations enabled by the new model are shown to track measured data over varying bias conditions.<<ETX>>

On-Wafer GaAs Schottky Diode Characterization Using an Integrated Pulse I-V/Pulse S-Parameter Measurement System

An automated on-wafer pulsed I-V pulsed S-parameter measurement system capable of synchronous voltage, current, and S-parameter sampling during 500-ns pulsed bias excursions has been demonstrated. Data obtained with this measurement system illustrate its utility for characterizing the relationships between Schottky diode quiescent bias conditions, rectifying barrier potential and C-V slope. These relationships result from deep levels in GaAs (traps) that affect the conduction processes of active devices. At microwave frequencies, the applied fields vary more rapidly than the time constants associated with traps: thus, carriers in deep levels do not contribute to the microwave properties of the device. Conventional bias-dependent S-parameter characterization used for nonlinear diode and field-effect transistor (FET) model development does not account for these effects. However, the measurement system described herein does account for these effects by coupling the applied quiescent bias with short, low-duty-factor, pulsed-bias excursions.

Applications of a generalized Dirichlet principle to transistor modeling

We report the theory, implementation and results of using a Poisson solver to compensate the measured valuer of drain conductance and transconductance in a nonlinear MESFET so as to render them compatible with a large-signal model. The consequent restructuring of the I-V curves is exhibited.

A generalized Dirichlet principle for smoothing small-signal measurements [MESFET]

We report the theory, implementation, and results of using a Poisson solver to compensate the measured values of drain conductance and transconductance in a nonlinear metal-semiconductor field-effect transistor so as to render them compatible with a large-signal model. The consequent restructuring of the I-V curves is exhibited.

The condition numbers arising in MESFET parameter extraction

Conditions numbers expressing the sensitivity of computed circuit element values to inaccuracies in S-parameter measurements are derived and evaluated for a standard small-signal MESFET model. The condition numbers shed light on the common difficulty experienced by transistor modelers in extracting accurate values for the input resistance. Other elements are also classified according to their sensitivity.

Mechanistic interpretation of the transcapacitance element

A simple gedanken experiment involving a two-parameter nonlinear capacitance is described. Careful tabulation of the chronology of states clearly demonstrates the apparent violation of both charge and energy conservation in a cycle of simulation. A mechanistic model of a capacitor controlled by two voltages is then devised; the local voltage drives the capacitor current as usual, while the remote voltage affects the capacitance by controlling the insertion of a dielectric between the plates. Now the tabulation of the states during the cycle exposes the energy loss mechanism, as well as accounting for all the charges transferred. Finally it is shown how the introduction of transcapacitance resolves the charge conservation issue, but leaves the energy imbalance unexplained. It is demonstrated that different choices of transcapacitance, each consistent with charge conservation, can result in different dissipative rates.<<ETX>>