Peter Y. Hsu
IBM
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Featured researches published by Peter Y. Hsu.
international symposium on computer architecture | 1986
Peter Y. Hsu; Edward S. Davidson
High speed scalar processing is an essential characteristic of high performance general purpose computer systems. Highly concurrent execution of scalar code is difficult due to data dependencies and conditional branches. This paper proposes an architectural concept called guarded instructions to reduce the penalty of conditional branches in deeply pipelined processors. A code generation heuristic, the decision tree scheduling technique, reorders instructions in a complex of basic blocks so as to make efficient use of guarded instructions. Performance evaluation of several benchmarks are presented, including a module from the UNIX kernel. Even with these difficult scalar code examples, a speedup of two is achievable by using conventional pipelined uniprocessors augmented by guard instructions, and a speedup of three or more can be achieved using processors with parallel instruction pipelines.
Archive | 2008
Richard Edmond Berry; Yen-Fu Chen; John Hans Handy-Bosma; Peter Y. Hsu; Mei Yang Selvage; Alan Richard Tannenbaum; Anthony Christopher Courtney Temple; Keith R. Walker
Archive | 1999
Jimmy Ming-Der Hsu; Peter Y. Hsu; William W. Lawton
Archive | 2004
Craig Henry Becker; Jimmy Ming-Der Hsu; Peter Y. Hsu
Archive | 1999
Jimmy Ming-Der Hsu; Peter Y. Hsu
Archive | 1998
Peter Y. Hsu; Matthew Perrins
Archive | 2003
Jimmy Ming-Der Hsu; Peter Y. Hsu
Archive | 2003
Jimmy Ming-Der Hsu; Peter Y. Hsu
Archive | 1998
Jimmy Ming-Der Hsu; Peter Y. Hsu; Yuan-Rong Lu
Archive | 2003
Jimmy Ming-Der Hsu; Peter Y. Hsu