Petre Anghelescu

Programmable cellular automata based encryption algorithm

In this paper, we present a new encryption algorithm based on the programmable cellular automata (PCA) theory. The cryptosystem is featured by its large key space and high speed due to cellular automatapsilas parallel information processing property. Moreover, the encryption and decryption devices share the identical modules, which give appropriate solutions for implementation of the cryptographic modules in high speed applications. So the scheme could be implemented efficiently in hardware, in reconfigurable hardware structures. The design has been implemented in both: in software using C# programming language and in hardware on a XC3S500E FPGA board using VHDL.

Block Encryption Using Hybrid Additive Cellular Automata

With the ever-increasing growth of data communication, the need for security and privacy has become a strong necessity. In these conditions, the necessity of new powerful encryption techniques becomes a crucial issue. In this paper Cellular Automata (CA) are applied to construct cryptography algorithms. We present an encryption system implemented on a structure of Hybrid Additive Cellular Automata (HACA) used for securing the medical data sent over the internet. The experimental results prove the power of cellular automata encryption systems. The method supports both software and hardware implementation. In this paper we present a fully functional software application for the data encryption of multimedia medical content.

FPGA Implementation of Hybrid Additive Programmable Cellular Automata Encryption Algorithm

This paper presents a hardware implementation in a FPGA circuit of an efficient encryption algorithm based on hybrid additive programmable cellular automata (HAPCA). We present a novel approach for a high-speed encryption system prototyped using a single FPGA. The approach is based upon a one-dimensional HAPCA architecture. A regular, modular, and cascadable hardware implementation of the cellular automata encryption algorithm has been implemented, which is efficient in terms of VLSI technology. The encryption algorithm based on the theory of cellular automata was realized using simple digital circuits and memory, and we implemented it on an emulation platform based on FPGA circuit. The experimental results prove the powerful of cellular automata encryption systems. The design has been specified in VHDL targeted on a XILINX XC3S400 based FPGA and verified for functional correctness by software simulation.

Surveillance system using IP camera and face-detection algorithm

This paper presents an efficient video surveillance system which consists of a network camera and an algorithm for automatically detection of the human faces in the monitoring area via real time video contents analysis. The main contribution of this research consists in a software application which is able to process the images received from the camera in order to detect human faces and trigger the process of saving the live stream as a video file. The algorithm for face-detection is based on the integral image (summed area table) - a model which allows the calculation of the sum of all pixels values from any rectangular area in the original image by doing only four operations of addition or subtraction. In addition, the application also includes a file containing data about needed tests in the detection algorithm by analyzing multiple images as templates. The application is written in C# language and experimental results are presented for images with different sizes and backgrounds.

FPGA Implementations of Cellular Automata for Pseudo-Random Number Generation

This paper present a hardware implementation in a FPGA circuit of an efficient pseudo-random number generator based on cellular automata. We demonstrate in this paper how microscopic (local) interactions influence the overall macroscopic (global) behavior of the whole system. We highlight the possibility to build the evolutionary systems on such a simple mathematical model as a cellular automata space by introducing the rules of evolution of individuals, their interaction, and their robustness to variations of the model. A regular, modular, and cascadable hardware implementation of the generator has been implemented, which is efficient in terms of VLSI technology. The design has been specified in VHDL targeted on a XC3S400 based FPGA and verified for functional correctness by software simulation

VLSI Implementation of High-Speed Cellular Automata Encryption Algorithm

This paper present a hardware implementation in a FPGA circuit of an efficient encryption algorithm based on cellular automata. We demonstrate in this paper how microscopic (local) interactions influence the overall macroscopic (global) behavior of the whole system. A regular, modular, and cascadable hardware implementation of the encryption system has been implemented, which is efficient in terms of VLSI technology. The experimental results prove the powerful of cellular automata encryption systems. The method supports both software and hardware implementation. The design has been specified in VHDL targeted on a XC3S400 based FPGA and verified for functional correctness by software simulation.

Vibration monitoring system for human activity detection

The monitoring and identification of suspicious activity is necessary for protection of Critical Infrastructure. The protection is extended to an early warning area beyond the physical security perimeter. The early warning area can cover from kilometer to hundred kilometers. The analysis of soil induced vibration by walking, digging, vehicle, can provide the useful information about human activity. In this paper is presented the development of a system for detection of human activity based on a network of vibration sensors. The main goal is to obtain a low power system that can operate continuously during several months. The acquisition hardware uses micro-powered circuits to meet the condition of low power conditions. Also are presented the result of acquisitions samples and identification of human steps.

Hardware implementation of programmable cellular automata encryption algorithm

In this paper, programmable cellular automata (PCAs) are used to design a symmetric key cryptosystem. Based on PCAs state transitions certain fundamental transformations are defined which represents block ciphering functions of the proposed enciphering scheme. In order to verify the proposed encryption algorithm, an experimental hardware platform based on a reconfigurable FPGA of type Spartan 3E XC3S500E was used. The enciphering scheme provides high speed, good security and it is ideally suit for hardware implementation in FPGA devices.

Human footstep detection using seismic sensors

This paper is focused on the hardware and software implementation of DSP algorithms for footstep detection using seismic signal. The main contribution of this research consists in a hardware design and in a software application that process the signals received from the seismic sensor of type SM-24 using PC sound card. The signal samples received from the sensor are stored in a .wav file. The main application is written in C# programming language and uses Matlab library (it was created a DLL library that was used in C#) in order to process the seismic signals on a low level.

HIGH-SPEED PCA ENCRYPTION ALGORITHM USING RECONFIGURABLE COMPUTING

In this work, an originally bio-inspired cryptosystem is developed. It is based on the use of cellular automata (CAs) as pseudorandom bit generators and programmable cellular automata (PCA) to construct the block ciphering functions of the proposed enciphering scheme. The cryptosystem is featured by resistance on different types of attacks and high speed due to the cellular automatas parallel information processing property. The proposed architecture could be efficiently implemented in reconfigurable hardware like field programmable gate arrays (FPGAs) and could be applied in high-speed data communication. The project was implemented in two experimental hardware platforms based on Spartan 3 XC3S400fg456-4 and XILINX Spartan 3E XC3S500E.