Phil C. Yeh

S/390 CMOS cryptographic coprocessor architecture: overview and design considerations

This paper describes the design objectives and presents an overview of the design for the IBM S/390® CMOS Cryptographic Coprocessor, also known as the S/390 cryptographic module (SCM). The SCM is fully compatible with the earlier S/390 cryptographic module, ICRF (Integrated Cryptographic Facility), and has been certified by the National Institute of Standards and Technology at the highest level of security qualification. The principal features and unique characteristics of the SCM are summarized in the context of the architecture design.

IBM system z10 performance improvements with software and hardware synergy

This paper describes efforts to more fully exploit the synergy potential between hardware and software to improve performance on the IBM System z® platform. Although the IBM commitment to upward compatibility for System z mainframes prevents us from engaging in hardware generational tuning, software stack improvements aimed at one generation of hardware tend to increase in value for subsequent generations. This paper presents some of the software synergy efforts that were made to complement hardware design characteristics to improve performance and that will continue to be of benefit in future machine generations. Also presented is IBM z/OS® HiperDispatch management, which minimizes cache coherency penalties when dispatching work, and the new IBM System z10™ hardware instrumentation, the central processor measurement facility (CPMF), which supports software performance optimizations by providing counters and sampling and allowing the software to measure central processor activities to determine hotspots. The CPMF is nondisruptive, has low overhead, and can run in multiple logical partitions simultaneously.

Coordination of time-of-day clocks among multiple systems

The IBM Enterprise Systems Architecture/390™ External-Time-Reference (ETR) architecture facilitates the synchronization of time-of-day (TOD) clocks to ensure consistent time-stamp data in an installation with multiple systems. The ETR architecture also provides a means by which the TOD clocks can be set automatically, without human intervention, to an accurate standard time source. This paper reviews the design considerations involved in providing these functions—along with “clock integrity” and continuous operation—as a consistent extension of the System/370™ TOD-clock architecture. The paper also provides a functional description of the IBM 9037 Sysplex Timer™, which is an implementation of the sending unit of the ETR network.

Integrated Cryptographic Facility of the Enterprise Systems Architecture/390: design considerations

This paper reviews the considerations that shaped the design of the Enterprise Systems Architecture/390™ Integrated Cryptographic Facility. It describes design issues, alternatives, and decisions, and it provides the rationale behind some of the decisions. Issues related to performance, security, usability, and availability are covered.