Philippe Sadot

Realization of a monochip Viterbi decoder in ASIC technology

An ASIC realization of a Viterbi decoder is presented for the convolutional code of rate 1/2 and constraint length 7 (generator polynomials 133 and 171) and the code derived from it by puncturing to provide a code of rate 3/4, or by reuse of the same polynomials to get codes of rate 1/4 and 1/8. The technology is CMOS 1.5 mu m, and the chip size is 14*14 mm/sup 2/. It contains about 45000 gates plus 3 three-port RAMs. The maximum user data rate of the chip in industrial worst-case conditions at 17 Mbit/s. The circuit is comprised of a coder and a decoder whose characteristics are described.<<ETX>>

A hybrid FEC-ARQ communication system for zero-error digital transmissions on the troposcatter channel

The results of a study defining an error-correcting scheme that permits very-high-reliability links for digital data transmissions over the troposcatter (Rayleigh) channel are presented. When the transmission channel is unidirectional, transmission error correction is made by means of a forward error correction (FEC). An automatic repeat request (ARQ) strategy feedback channel is used to reduce the complexity of the coding scheme and the interleaving depth. A hybrid ARQ and FEC system is proposed using a long constraint length convolutional code and sequential decoding algorithm, associated with a modified go-back-N ARQ protocol, able to cope with a two-way noisy channel. The protocol control is achieved by a modified high-level data link control (HDLC) structure. The system is tested on a simulated Rayleigh channel. The simulations have shown no transmission errors, corresponding to a binary error rate lower than 10/sup -9/.<<ETX>>

A hybrid FEC-ARQ communication system using sequential decoding

This paper presents the results of a study which aimes at defining an error correcting scheme matched to the troposcatter (Rayleigh) channel, which would permit to insure very high reliability links for digital data transmissions.

Errcr correcting coding scheme against partial time jammers

This paper proposes a new approach to antijamming against high energy partial time jammers concerning applications where the usual scheme sprectrum spreading + error correcting coding is not efficient because of the small value of the spreading gain, due to the channel bandwith limitation and to the minimum data rate required on the link. It consists in exploiting the short duration of the jamming pulses and trying to reconstitute the erased information by means of error correcting codes. An efficient coding scheme and a new method of erasure localization are proposed.