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Dive into the research topics where Piero Maestrini is active.

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Featured researches published by Piero Maestrini.


IEEE Transactions on Computers | 1973

Error Correcting Properties of Redundant Residue Number Systems

Ferruccio Barsi; Piero Maestrini

The error correcting properties of the redundant residue number systems (RNS) are investigated through a more natural a approach than was previously known. The necessary and sufficient condition for the correction of a given error affecting a single residue digit of any legitimate number in an RRNS is determined. The minimal redundancy allowing the correction of the whole class of the single residue digit errors is derived and an efficienit procedure for error correction is given. Moreover, it is shown that a smaller redundancy and a single redundant modulus may allow the correction of certain important subclasses of single residue digit errors, e.g., the set of errors affecting a single bit in the code. Examples are given.


IEEE Transactions on Computers | 1974

Error Detection and Correction by Product Codes in Residue Number Systems

Ferruccio Barsi; Piero Maestrini

The arithmetic error detecting and correcting capabilities of product (AN) codes in residue number systems (RNS) are described. The redundancy necessary and sufficient to allow single residue digit error detection or correction is determined, under the hypothesis that the error affects either an arbitrary legitimate number or a number in overflow. It is shown that single-bit errors are also correctable, provided that the residue digits are conveniently encoded. Two different approaches to this problem are discussed. Simple procedures for error detection and correction are presented, and it is shown that the additive overflow detection is a by-product of such procedures. Proofs and examples are given.


dependable systems and networks | 2003

Dependable and secure data storage and retrieval in mobile, wireless networks

Stefano Chessa; Piero Maestrini

This paper introduces a distributed data storage for mobile, wireless networks based on a peer-to-peer paradigm. The distributed storage provides support to create and share files under a write-once model, and ensures at the same time data confidentiality and dependability by encoding files in a Redundant Residue Number System. More specifically files are partitioned into records and each record in encoded separately as (h+r)-tuples of data residues using h+r moduli. In turn, the residues are distributed among the mobiles in the network. Dependability is ensured since data can be reconstructed in the presence of up to s≤r residue erasures, combined with up to ¨ o 2 s r − corrupted residues, and data confidentiality is ensured since recovering the original information requires knowledge of the entire set of moduli.


symposium on reliable distributed systems | 1995

Self diagnosis of processor arrays using a comparison model

Piero Maestrini; Paolo Santi

This paper introduces a diagnosing algorithm for bidimensional processor arrays, where processors are interconnected in horizontal and vertical meshes. For the purpose of diagnosis, the array is considered to be partitioned in square clusters of processors. The algorithm is based on interprocessor tests, using a comparison model. The algorithm, which is divided in four steps, called intracluster diagnosis, interluster diagnosis, fault-free core identification and augmentation, identifies a set of non-faulty and a set of faulty units. The diagnosis is proved to be correct in the worst case, assuming that the actual number of faulty processors is no more that T(N), an increasing function of the number N of processors. It is shown that T(N) is O(N/sup 2/3/). Although correct, the diagnosis is generally incomplete. However, using probabilistic techniques, it is shown that the diagnosis is very likely to be complete under the same limitations which ensure correctness in the worst case.


international symposium on computer architecture | 1983

A VLSI tree machine for relational data bases

Maurizio A. Bonuccelli; Elena Lodi; Fabrizio Luccio; Piero Maestrini; Linda Pagli

A VLSI chip for performing relational data base operations is proposed. The chip is a tree of processors (TOP), where each chip has elementary storage and processing capabilities. A relation will be stored in the lowest levels of a TOP. More precisely, every m-tuple will occupy a subtree whose root is s&equil; [log2(m+1)] −1 levels above the leaves. Denoting by h the height of the tree, the upper h-s levels will be used for routing and bookkeeping purposes. A number of basic operations such as allocate and deallocate subtrees, insert and compare m-tuples etc., are defined for the TOPs. Relational operations are effectively performed as simple combinations of basic operations. The architecture of a data base machine based on TOPs is also sketched. Such a machine is feasible with the current VLSI technology and could become attractive in few years if density and performance of VLSI keep improving at the current rate.


Information & Computation | 1980

Error codes constructed in residue number systems with non-pairwise-prime moduli

Ferruccio Barsi; Piero Maestrini

Codes constructed in a Residue Number System (RNS) of moduli m 1 , m 2 , ..., m n are non-binary, arithmetic codes whose codewords are vectors where the i th component is m i -valued (1 ≤ i ≤ n ). A new class of codes in RNS is described, where redundancy is introduced by removing the constraint that the moduli of the RNS be pairwise prime. The error-detecting and correcting capabilities of such codes are discussed and a simple approach to error detection, localization and correction is presented. Although the codes under consideration are quite inefficient in some respects, it is shown that codes is examined in more detail. Codes in this subclass, besides correcting all single errors, also correct almost all of double errors and localize some errors of higher multiplicity, with less redundancy than required to construct optimal 2-correcting codes in RNS.


Computer Communications | 2005

Fault recovery mechanism in single-hop sensor networks

Stefano Chessa; Piero Maestrini

This paper introduces a memory efficient fault recovery scheme for single hop wireless sensor networks, where the network is able to operate independently of the sink node for long periods of time. The proposed scheme does neither require that the sensors be equipped with stable storage nor that they are permanently connected to the sink node. Rather, the sensors cooperate to maintain redundant information in their memories in order to be able to recover the lost information after a failure, and to distribute the recovered information among the memories of the surviving sensors.


IEEE Transactions on Information Theory | 1978

Improved decoding algorithms for arithmetic residue codes (Corresp.)

Ferruccio Barsi; Piero Maestrini

Two classes of arithmetic codes constructed in residue number systems are considered, and decoding algorithms based on the convergents of continued fractions are presented. The advantages of the proposed algorithms over those previously known are discussed.


Theoretical Computer Science | 2003

Fault-diagnosis of grid structures

Antonio Caruso; Stefano Chessa; Piero Maestrini; Paolo Santi

The problem of fault diagnosis in grid-connected systems is considered. A diagnosis algorithm, called DAGS and based on the PMC model, is presented. DAGS provides a diagnosis which is shown to be correct, although possibly incomplete, if the cardinality of the actual fault set is below a bound Tσ, dependent of the actual syndrome σ. A bound T independent of σ is also derived by a worst-case analysis covering the cases of triangular, square, hexagonal and octagonal grids. T is shown to be θ(n2/3), where n is the size of the system, for all the grids considered.


IEEE Transactions on Computers | 2001

Correct and almost complete diagnosis of processor grids

Stefano Chessa; Piero Maestrini

A new diagnosis algorithm for square grids is introduced. The algorithm always provides correct diagnosis if the number of faulty processors is below T, a bound with T /spl epsi//spl Theta/(n/sup 2/3/), which was derived by worst-case analysis. A more effective tool to validate the diagnosis correctness is the syndrome dependent bound T/sub /spl sigma// with T/sub /spl sigma///spl ges/T, asserted by the diagnosis algorithm itself for every given diagnosis experiment. Simulation studies provided evidence that the diagnosis is complete or almost complete if the number of faults is below T. The fraction of units which cannot be identified as either faulty or nonfaulty remains relatively small as long as the number of faults is below n/3 and, as long as the number of faults is below n/2, the diagnosis is correct with high probability.

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Paolo Santi

Massachusetts Institute of Technology

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Luiz Carlos Pessoa Albini

Istituto di Scienza e Tecnologie dell'Informazione

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R. Di Pietro

Sapienza University of Rome

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