Pierre Dissaux

Architecture Description Languages

Tutorial.- An Overview of the SAE Architecture Analysis & Design Language (AADL) Standard: A Basis for Model-Based Architecture-Driven Embedded Systems Engineering.- Models and Analysis.- Deploying QoS Contracts in the Architectural Level.- Hierarchical Composition and Abstraction in Architecture Models.- Pattern-Based Analysis of an Embedded Real-Time System Architecture.- An ADL Centric Approach for the Formal Design of Real-Time Systems.- Specification and Design.- Safarchie Studio: ArgoUML Extensions to Build Safe Architectures.- Enhancing the Role of Interfaces in Software Architecture Description Languages (ADLs).- How ADLs Can Help in Adapting the CORBA Component Model to Real-Time Embedded Software Design.- UML2 as an ADL Hierarchichal Hardware Modeling.- Domain Specific Architecture Description Languages.- Specification of Intel IA-32 Using an Architecture Description Language.- COTRE as an AADL Profile.- EAST-ADL - An Architecture Description Language.- Building Tool Suite for AADL.

Towards the verification of real-time systems in avionics: the Cotre approach

Abstract The Cotre Project1 is aimed at providing a design methodology and an associated software environment for the development of embedded realtime avionic systems. It contributes to bridging the gap between requirements of such systems, typically expressed in Architecture Description Languages, and formal development techniques, relying on system modeling and verification. This paper presents the current status of the language and platform adopted in Cotre project. The need for using various formalisms leads us to adopt an intermediate language. We describe this language, its translation in the chosen formalisms and present an application example.

Can We Increase the Usability of Real Time Scheduling Theory? The Cheddar Project

The Cheddar project deals with real time scheduling theory. Many industrial projects do not perform performance analysis with real time scheduling theory even if the demand for the use of this theory is large. The Cheddar project investigates why real time scheduling theory is not used and how its usability can be increased. The Cheddar project was launched at the University of Brest in 2002. This article presents a summary of its contributions and ongoing works.

Synchronization of Models of Rich Languages with Triple Graph Grammars: an Experience Report *

We report our experience of using Triple Graph Grammars (TGG) to synchronize models of the rich and complex Architecture Analysis and Design Language (AADL), an aerospace standard of the Society of Automotive Engineers. A synchronization layer has been developed between the OSATE (Open Source AADL Tool Environment) textual editor and the Adele graphical editor in order to improve their integration. Adele has been designed to support editing AADL models in a way that does not necessarily follow the structure of the language, but is adapted to the way designers think. For this reason, it operates on a different meta-model than OSATE. As a result, changes on the graphical model must be propagated automatically to the textual model to ensure consistency of the models. Since Adele does not cover the complete AADL language, this must be done without re-instantiation of the objects to avoid losing the information not represented in the graphical part. The TGG language implemented in the MoTE tool has been used to synchronize the tools. Our results provide a validation of the TGG approach for synchronizing models of large meta-models, but also show that model synchronization remains a challenging task, since several improvements of the TGG language and its tool were required to succeed.

Architecture models refinement for fine grain timing analysis of embedded systems

As real-time systems have become more and more complex, architects rely on abstract models of computation in order to design and analyse these systems. In order to ease the production of source code that respects such models of computation, developper can take advantage of code generators and/or middleware. However, when analyzing an abstract model of computation, timing overheads due to generated code or middleware components are not taken into account. Answering this issue is even more problematic in the domain of embedded systems because of the variability of execution platforms. To tackle this problem, we present in this paper a model refinement and timing analysis framework: abstract models of computation are first transformed in more precise models, which include the timing characteristics of the execution platform. These refined models are then used for a more precise timing analysis. The experiment results we present in this paper show that our method can deal with realistic software architecture of real-time systems.

An Ada design pattern recognition tool for AADL performance analysis

This article deals with performance verification of architecture models of real-time embedded systems. Although real-time scheduling theory provides numerous analytical methods called feasibility tests for scheduling analysis, their use is a complicated task. In order to assist an architecture model designer in early verification, we provide an approach, based on real-time specific design patterns, enabling an automatic schedulability analysis. This analysis is based on existing feasibility tests, whose selection is deduced from the compliance of the system to a design pattern and other systems properties. Those conformity verifications are integrated into a schedulability tool called Cheddar. We show how to model the relationships between design patterns and feasibility tests and design patterns themselves. Based on these models, we apply a model-based engineering process to generate, in Ada, a feasibility test selection tool. The tool is able to detect from an architecture model which are the feasibility tests that the designer can apply. We explain a method for a designer willing to use this approach. We also describe the design patterns defined and the selection algorithm.

Enforcing software engineering tools interoperability: An example with AADL subsets

Model-Based Engineering is now a valuable asset to design complex real-time systems. Toolchains are assembled to cover the various stages of the process: high-level modeling, analysis and code generation. Yet tools put heterogeneous requirements on models: specific modeling patterns must be respected so that a given analysis is performed. This creates an interoperability paradox: models must be tuned not given system requirements, but to abide to tools capabilities. In this paper, we propose a systematic process to define the definition, comparison and enforcement of tools-specific subsets. Thus, we guide the user in selecting the tools that could support its engineering process. Our contribution is illustrated in the context of the AADL Architecture Design Language.

Comparison of Six Ways to Extend the Scope of Cheddar to AADL v2 with Osate

Cheddar is a framework dedicated to the specification of real-time schedulers, and to their analysis by simulation. It is developed in Ada. Some parts of its modular architecture are generated by Platypus, a software engineering tool based on the STEP standards. Cheddar owns a dedicated specification language. It can also process AADL v1 specifications. In order to extend the scope of Cheddar to AADL v2 specifications, we introduced a translation component called Dairy. It aims at creating valid Cheddar data from AADL v2 specifications. The frontend of Dairy comes from Osate v2. Hence, the backend of Dairy must produce Cheddar data from instances of the AADL metamodel that has been implemented into Osate. Both of Cheddar and Osate are legacy systems built with different frameworks, different standards and different languages. Hence, the design of Dairy poses the problem of their integration. We postulate that an implemented metamodel should neither be rewritten nor be duplicated in order to keep unchanged its legacy equipment. Then, integration should better rely on data interoperability standards. In this paper, we illustrate this idea by investigating six different designs of Dairy to perform the integration of Cheddar and Osate. We compare them with each other according to reusability, code generation, and transformation of metamodels.

Enforcing Applicability of Real-Time Scheduling Theory Feasibility Tests with the Use of Design-Patterns

This article deals with performance verifications of architecture models of real-time embedded systems. We focus on models verified with the real-time scheduling theory. To perform verifications with the real-time scheduling theory, the architecture designers must check that their models are compliant with the assumptions of this theory. Unfortunately, this task is difficult since it requires that designers have a deep understanding of the real-time scheduling theory. In this article, we investigate how to help designers to check that an architecture model is compliant with this theory. We focus on feasibility tests. Feasibility tests are analytical methods proposed by the real-time scheduling theory. We show how to explicitly model the relationships between an architectural model and feasibility tests. From these models, we apply a model-based engineering process to generate a decision tool what is able to detect from an architecture model which are the feasibility tests that the designer can apply.

Scheduling analysis from architectural models of embedded multi-processor systems

As embedded systems need more and more computing power, many products require hardware platforms based on multiple processors. In case of real-time constrained systems, the use of scheduling analysis tools is mandatory to validate the design choices, and to better use the processing capacity of the system. To this end, this paper presents the extension of the scheduling analysis tool Cheddar to deal with multi-processor scheduling. In a Model Driven Engineering approach, useful information about the scheduling of the application is extracted from a model expressed with an architectural language called AADL. We also define how the AADL model must be written to express the standard policies for the multi-processor scheduling.