Pisit Liutanakul

Maximum power point tracking by incremental conductance method for photovoltaic systems with phase shifted full-bridge dc-dc converter

Because of sunshine variation, output power of photo-voltaic (PV) array can be fluctuated. In order to obtain fully utilization from the PV array, an algorithm of maximum power point tracking (MPPT) functions with a high efficiency of dc-dc converter is necessary. This paper presents a phase-shifted full-bridge dc-to-dc converter which is appropriate for PV application. Correspond to power switches signals; operation modes of the converter are described. By neglect of shading condition, two classical algorithms of MPPT; i.e. Incremental Conductance (INC) method and Perturbation and Observation (P&O) method are applied to the converter. The simulation results of 3kW PV array together with the converter show that the INC method is more appropriated than the P&O method because it gives a higher speed and accuracy of system performance.

Improvement of self-oscillating electronic ballast with high power factor: A combination of charged-pump and valley-fill

This paper proposes a novel 36W / 220Vrms / 50Hz of half-bridge inverter self-oscillating electronic ballast for a fluorescent lamp with high power factor and low line input current harmonics. The system performance can be improved by combining together with a charged pump and valley fill circuit. Details of design and circuit operation are described. This ballast is developed to reduce a number of ICs controlling power electronic switches that are costly and sizeable. Instead of these ICs, This ballast employs self-oscillation method to control power electronic switches. The combination of a bridge rectifier, current source charge pump with valley fill circuit to improve power factor and Series - Resonant Parallel - Load Inverter (SRPLI) are main concept. This electronic ballast is designed and tested to find the proper frequency and signal to stimulate the operation of power electronic switches to trigger fluorescent lamp suitably. The experimental results show that the proper frequency of the prototype is around 40 kHz with input power factor of 0.988, THDi 4.7% at full load and efficiency of more than 90%.

Stabilization of input filter/dc-to-dc converter

Thanks to the impedance criteria, details of an analytical method allowing the stability analysis of an electric system constituted by a resonant LfCf input filter connected to a controlled dc-to-dc buck converter is presented. The considered system is analyzed by using small-signal linearization around the operating point of the converter and presented in frequency domain. Based on the resonant LfCf input filter, three basic structures of passive damping input filters are investigated. It is shown that the stability problem can be avoided by forcing the magnitude of minor loop gain Zm(s) to be less than one. However, in some application of electric system, it is sometime impossible to change neither input filter structure nor any input filter components value so an active damping control technique for stabilize the cascade connection between the small damping LfCf input filter/dc-to-dc buck converter is proposed. The simulation results show the validation of the analysis.

Simplify and automate the boost converter design regarding mode of controller and feedforward technique

Regarding the power quality problems, harmonic voltages and currents are a consequence of electric nonlinear loads. A boost converter is one of the most popular topology in a medium power unit in order to correct the power factor and reduce harmonic currents. However, this circuit is a little bit complicated in the power stage and control design. As in the sinusoidal current-tracking technique, the PI control design using pole placement is proposed to gain current tracking ability. Phase margin and bandwidth play a key role to achieve such design parameters. This paper presents the simplified control design step-by-step. Cutoff frequency and damping ratio are mainly used in the process of examining control parameters. The simulations are presented to validate the proposed design. Sinusoidal current-tracking effectiveness is demonstrated through simulation results.

Feasibility of reduced order modelling of Z-source impedance network: Applications for switching power converter designs

Regarding the great advantages of impedance source converter topologies, research trends based on conventional Z-source inverter (ZSI) are much more interesting. However, it is very complicated because such a model is forth-order system. The higher order model remains a large obstacle for switching power converter design of various applications. This paper investigates the feasibility of reduced order modelling of Z-source impedance network. The PWM switch technique is used for finding the small-signal model of ZSI. Therefore, the interested transfer function of ZSI can be found easily. Step by step of reduced order modelling method is also described. The proposed method uses the concept of neglected pole that responds faster than the dominant pole five or more times. Based on this, the ZSI system can be considered as a second order transfer function which is very helpful for power switching converter designs. Bode diagrams of the full order and reduced order system are plotted and compared to verify the proposed method. Moreover, the dependable range of frequency is illustrated since the non-minimum phase property of ZSI. Simulation results show the proposed method is satisfied and also makes sense in a range of frequency in applications for power switching converter designs.

A simple dead-time compensation technique for single-phase full-bridge PWM rectifier

Dead-time is added into pulse width modulation (PWM) signals to prevent a short circuit of the DC bus. However, adding the dead-time can cause higher total harmonic current distortion (THDI). In order to minimize this problem, this paper proposes a simple dead-time compensation technique for single-phase full-bridge PWM rectifier, which is used in power factor correction (PFC) application. The proposed technique uses a concept that estimates an average error voltage, which is the result from the dead-time effect, and then compensates this error by adding opposite value of error into the converter voltage reference. The proposed technique can be easily implemented on software-based microcontroller without any additional hardware and uses more resource to process slightly. In addition, a suitable PI current controller is proposed. The proposed technique was verified by a simulation. The simulation results showed that the proposed dead-time compensation technique can reduce the THDI. Furthermore, when the proposed dead-time compensation technique was used together with the suitable PI current controller at lower output limits, the THDI was further reduced.