Prabhas Chongstitvatana

A hardware implementation of the Compact Genetic Algorithm

We propose a hardware implementation of the Compact Genetic Algorithm (GA). The design is realized using the Verilog hardware description language (HDL) and then fabricated on an FPGA. Our design, though simple, runs about 1000 times faster than the software executing on a workstation. An alternative hardware for linkage learning is also proposed in order to enhance the capability of the Compact GA to solve highly deceptive problems.

Parallel genetic algorithm with parameter adaptation

Abstract This paper presents an adaptive algorithm that can adjust parameters of a genetic algorithm according to the observed performance. The parameter adaptation occurs in parallel to the running of the genetic algorithm. The proposed method is compared with the algorithms that use random parameter sets and a standard parameter set. The experimental results show that the proposed method offers two advantages over the other competing methods: the reliability in finding the optimal solution and the time required for finding the optimal solution.

Synthesis of Synchronous Sequential Logic Circuits from Partial Input/Output Sequences

This work takes a different approach to synthesize a synchronous sequential logic circuit. The input of the synthesizer is a partial input/output sequence. This type of specification is not suitable for conventional synthesis methods. Genetic Algorithm (GA) was applied to synthesize the desired circuit that performs according to the input/output sequences. GA searches for circuits that represent the desired state transition function. Additional combination circuits that map states to the corresponding outputs are synthesized by conventional methods. The target of our synthesis is a type of registered Programmable Array Logic which is commercially available as GAL. We are able to synthesize various types of synchronous sequential logic circuit such as counter, serial adder, frequency divider, modulo-5 detector and parity checker.

Prediction of the Stock Exchange of Thailand using adaptive evolution strategies

In this paper we present a prediction process of the Stock Exchange of Thailand index using adaptive evolution strategies. The prediction process does not require the knowledge of the functional form a priori. In each recursion step, genetic algorithm is used to evolve the structure of the prediction function, whereas the coefficient is evolved by evolution strategies. The proposed method has been shown to successfully predict the Stock Exchange of Thailand and returns an error less than 3%. This methodology is also a tool for knowledge discovery in a specific application. We have found that the SET index can be reasonably forecasted with only two factors: the Hang Seng index and minimum loan rate. The proposed method also achieves a lower prediction error when compared with multiple regression method

Improving correctness of finite-state machine synthesis from multiple partial input/output sequences

Our previous work focused on the synthesis of sequential circuits based on a partial input/output sequence. As the behavioural description of the target circuit is not known the correctness of the result can not be verified. This paper proposes a method which increases the correctness percentage of the finite-state machine (FSM) synthesis using multiple partial input/output sequences. The synthesizer is based on genetic algorithm. The experimental results show that the correctness percentage can be increased to 100% by increasing the number of input/output sequences.

An Uncalibrated Stereo Visual Servo System

We describe a robotic system composed of a manipulator and two cameras. We use the vision system to guide the robot hand to a visible target. The camera positions are known only approximately. Our system does not use the details of the kinematics of the manipulator. There is no common frame of reference linking vision system, workspace and robot hand. The stereo vision system gives information in terms of picture coordinates. This information is used to control a three degree of freedom robot manipulator in a straightforward and robust fashion, in terms of lines and points visible in the images. We describe the implementation with which we tested this idea.

Building-block Identification by Simultaneity Matrix

AbstractThis paper presents a study of building blocks (BBs) in the context of genetic algorithms (GAs). In GAs literature, the BBs are common structures of high-quality solutions. The aim is to identify and maintain the BBs while performing solution recombination. To identify the BBs, we construct an

A parallel genetic algorithm for adaptive hardware and its application to ECG signal classification

\ell \times \ell