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Dive into the research topics where Prakash Krishnamoorthy is active.

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Featured researches published by Prakash Krishnamoorthy.


symposium on cloud computing | 2013

Quotient prediction for low power division

Prakash Krishnamoorthy; Ramesh C. Tekumalla

This work presents a variation of the non restoring division algorithm that has been optimized for low power consumption. The approach uses the value of the partial remainder at any stage in the computation to predict the quotient bits for a certain number of steps thereby allowing an equal number of computation steps to be skipped. This results in a significant reduction in switching activity in the computational stages. Simulations using the novel divider show up to 40% reduction in sequential switching activity and 20% reduction in combinational switching activity. On an average, this method uses 59% less addition operations as compared to the regular non restoring division algorithm.


north atlantic test workshop | 2014

On-chip Clock Testing and Frequency Measurement

Ramesh C. Tekumalla; Prakash Krishnamoorthy

This work presents a method to measure the frequency of an on-chip test clock in relation to a reference clock. Frequency measurement is accomplished by counting pulses of both test and reference clocks, albeit adjusting the reference clock pulse count to estimate the number of pulses that the test clock is expected to see. The proposed method places no constraints on the frequency relationship between the test and reference clocks which allows the reference clock frequency to be any multiple δ (1 <; δ ≤ 1) of the test clock frequency. Doing so allows a high degree of flexibility and a wide range of scenarios for which this approach could be deployed to measure the frequency of an unknown clock. Applications of this approach range from calibrating the frequency of on chip at speed test clocks for DFT, measurement of ppm of clocks subject to variations in process, temperature, spread spectrum effects among other considerations. The method also guarantees cycle to cycle accuracy in frequency measurement. Multiple on chips clocks can be tested using one instance of this method when the frequency information of all clocks to be tested is made available in specific register files.


symposium on cloud computing | 2013

Power aware transformation of bandlimited signals

Prakash Krishnamoorthy; Ramesh C. Tekumalla

This work presents an universal, lossless, linear, low complexity data transformation algorithm based on the sampling theorem that significantly reduces the complexity of operations in data processing systems. While many lossy and lossless compression methods are in existence, the data compressed by such methods cannot be directly processed by signal processing systems without decompression due to the non linear nature of most data compression algorithms. If there were linear compression method in existence, then compressed data could directly be passed to digital signal processing systems. Doing so significantly reduces the complexity of signal processing operations including additional benefits in the form of reduced power dissipation, improved signal integrity and better bandwidth utilization. This approach can be used in applications for the storage and retrieval of data from storage mediums such as read channels, system and processor interconnects including memory buses. System level simulations show that this method not only reduces the amount of data, but also improves performance due to improved signal integrity and significant reduction in power dissipation (upto 15% reduction) associated with the processing of multimedia content.


Archive | 2012

Low-power and area-efficient scan cell for integrated circuit testing

Ramesh C. Tekumalla; Priyesh Kumar; Prakash Krishnamoorthy; Parag Madhani


Archive | 2012

SCAN TEST CIRCUITRY CONFIGURED FOR BYPASSING SELECTED SEGMENTS OF A MULTI-SEGMENT SCAN CHAIN

Ramesh C. Tekumalla; Prakash Krishnamoorthy; Niranjan Anant Pol; Vineet Sreekumar


Archive | 2011

Scan Test Circuitry with Delay Defect Bypass Functionality

Ramesh C. Tekumalla; Prakash Krishnamoorthy


Archive | 2012

Scan test circuitry configured to prevent capture of potentially non-deterministic values

Ramesh C. Tekumalla; Prakash Krishnamoorthy


Archive | 2012

CLOCK CONTROL FOR REDUCING TIMING EXCEPTIONS IN SCAN TESTING OF AN INTEGRATED CIRCUIT

Ramesh C. Tekumalla; Prakash Krishnamoorthy; Vijay Sharma


Archive | 2011

Integrated circuit with transition control circuitry for limiting scan test signal transitions during scan testing

Ramesh C. Tekumalla; Prakash Krishnamoorthy


Archive | 2011

DIVIDER CIRCUITRY WITH QUOTIENT PREDICTION BASED ON ESTIMATED PARTIAL REMAINDER

Prakash Krishnamoorthy; Ramesh C. Tekumalla

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