Pyung Moon

Analysis of Bias Stress Instability in Amorphous InGaZnO Thin-Film Transistors

In this paper, we report an analysis of electrical bias stress instability in amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). Understanding the variations of TFT characteristics under an electrical bias stress is important for commercial goals. In this experiment, the positive gate bias is initially applied to the tested a-IGZO TFTs, and subsequently, the negative gate bias is applied to the TFTs. For comparison with the subsequently negative-gate-bias-applied TFTs, another experiment is performed by directly applying the negative gate bias to the tested TFTs. For the positive gate bias stress, a positive shift in the threshold voltage (Vth) with no apparent change in the subthreshold swing (SSUB) is observed. On the other hand, when the negative gate bias is subsequently applied, the TFTs exhibit higher mobility with no significant change in SSUB, whereas the shift of the Vth is much smaller than that in the positive gate bias stress case. These phenomena are most likely induced by positively charged donor-like subgap density of states and the detrapping of trapped interface charge during the positive gate bias stress. The proposed mechanism was verified by device simulation. Thus, the proposed model can explain the instability for both positive and negative bias stresses in a-IGZO TFTs.

Modeling and optimization of the growth rate for ZnO thin films using neural networks and genetic algorithms

The process modeling for the growth rate in pulsed laser deposition (PLD)-grown ZnO thin films was investigated using neural networks (NNets) based on the back-propagation (BP) algorithm and the process recipes was optimized via genetic algorithms (GAs). Two input factors were examined with respect to the growth rate as the response factor. D-optimal experimental design technique was performed and the growth rate was characterized by NNets based on the BP algorithm. GAs was then used to search the desired recipes for the desired growth rate on the process. The statistical analysis for those results was then used to verify the fitness of the nonlinear process model. Based on the results, this modeling methodology can explain the characteristics of the thin film growth mechanism varying with process conditions.

Density-of-States Modeling of Solution-Processed InGaZnO Thin-Film Transistors

The effects of Ga composition on the performance of InGaZnO (IGZO) thin-film transistors (TFTs) prepared by a sol-gel method are investigated, and the density of states (DOS) is characterized by the device modeling. The TFT mode is changed from a depletion type to an enhancement type, and the extracted DOS parameters are reduced with the increase of Ga contents. The extracted DOS distribution has a higher peak value than that of an IGZO TFT prepared by physical vapor deposition.

Process estimation and optimized recipes of ZnO: Ga thin film characteristics for transparent electrode applications

Ga-doped zinc oxide (ZnO:Ga) thin films were prepared on glass substrate by magnetron sputtering at room temperature (RT) and thermally annealed in hydrogen atmosphere for 1h. The effects of film thickness and annealing temperature on sheet resistance, transmittance and figure of merit of ZnO:Ga thin films were analyzed and modeled using the artificial neural networks (NNets). The NNet models presented the good prediction on sheet resistance, transmittance and figure of merit of ZnO:Ga thin films and it was found that the electrical and optical properties of ZnO:Ga thin films were enhanced by thermal annealing. After NNet models were verified, genetic algorithm (GA) was used to search the optimized recipe for the desired figure of merit of ZnO:Ga thin films. The methodology allows us to estimate the optimal process condition with a small number of experiments.

Modeling and optimization of ITO/Al/ITO multilayer films characteristics using neural network and genetic algorithm

Highlights? We investigated ITO/Al/ITO multilayer films characteristics. ? Variations of Al film thickness and annealing temperature. ? NNet models well represent the characteristics of ITO/Al/ITO multilayer films. ? GA is used to find optimum process condition for maximum figure of merit. In this paper, ITO/Al/ITO multilayer films are fabricated with the variations of Al film thickness and annealing temperature. The effects of Al film thickness and annealing temperature on sheet resistance, optical transmittance, and the figure of merit are analyzed in the aid of the artificial neural network (NNet) models. In order to verify the fitness of NNet model, the root mean square error (RMSE) of training and testing data are calculated. The NNet models well represent the measured sheet resistance, optical transmittance, and the figure of merit. After NNet model is established, genetic algorithm (GA) is used to find the optimum process condition for the ITO/Al/ITO multilayer films to obtain maximum figure of merit in the design space.

Characterization of Al 2 O 3 films grown by electron beam evaporator on Si substrates

We report the characterization of aluminum oxide (Al<inf>2</inf>O<inf>3</inf>) films which are grown on Si substrates by electron beam evaporator. This paper focuses on the characteristic variation of Al2O3 films depending on the different annealing techniques, such as post-deposition annealing and post-metallization annealing. The capacitance-voltage (C-V) curves indicate a negative charge and interface trap charge density between the Al<inf>2</inf>O<inf>3</inf> film and Si interface. The current-voltage (I-V) curves show a leakage current. The x-ray diffraction (XRD) patterns show the crystallinity of Al<inf>2</inf>O<inf>3</inf> films. Based on the results, the annealing effect is important condition to increase negative fixed charge in the Al<inf>2</inf>O<inf>3</inf> films.

Methodology for improvement of data retention in floating gate flash memory using leakage current estimation

The importance of data retention characteristic is increased as the memory has been scaled down and multi-level programming. The leakage current of the inter-poly dielectric (IPD) at low electric field is related with data retention and the charge of the threshold voltage distribution is increased when the number of storage charges in the floating gate is increased. In order to improve data retention characteristics, the minimization of leakage current variation with respect to the applied electric field on IPD is necessary. In this paper, the effect of the electric potential of IPD on the leakage current is examined and the leakage current at low electric field is predicted. Based on the results, the method for improving the data retention by reducing the leakage current is proposed.

Electrical characterization and conduction mechanism of high-k Ti 1−x Si x O 2 gate dielectrics

Ti<inf>1−x</inf>Si<inf>x</inf>O<inf>2</inf> dielectric thin films were prepared by co-sputtering deposition at room temperature. Electrical properties of high-k Ti<inf>1−x</inf>Si<inf>x</inf>O<inf>2</inf> dielectric thin film were characterized and the leakage current mechanism was analyzed. As the TiO<inf>2</inf> power increases, the dielectric constant is increased from 14 to 43 and the dominant leakage current mechanism is changed from Schottky emission to Poole-Frenkel emission.

Analysis of Intrinsic Charge Loss Mechanisms for Nanoscale nand Flash Memory

In the current memory market, many researchers have analyzed the data retention characteristic and predicted the related leakage mechanism. Most studies have shown that the dominant degradation of retention characteristics of Flash memory occurs in the tunneling oxide after program/erase cycling. However, serious degradation of the retention characteristics is also seen in the intrinsic situation before program/erase cycling of devices through the oxide-nitride-oxide (ONO) interpoly dielectric. In this paper, we analyze that degradation by examining the various charge loss mechanisms of the device before cycling and extract two appropriate charge loss mechanisms by comparing the measured Vth data with the TCAD simulation data, and we verify the mechanisms by extracting the activation energy of each mechanism. We also analyze the effects on those two mechanisms as the ONO thickness and temperature are changed. Based on the results, we establish the intrinsic leakage mechanism through the ONO layers and predict the change in leakage mechanism as the thickness of the ONO layers is decreased.

Effect of electric field polarity on inter-poly dielectric during cell operation for the retention characteristics

Retention characteristic represents a capability to maintain the storage data and it is related with the reliability of memory device. The retention characteristic is degraded by the leakage of charges from a floating gate to a control gate, and thus the leakage current at low and moderate electric field of inter-poly dielectric (IPD) is one of the important characteristic for floating gate type flash memories. In addition, it is necessary to investigate the effects of the electric field polarity on the electric characteristics of IPD because the electric field polarity is changed as the cell operations such as the programming and erasing. Therefore, in this paper, the variation of the leakage current of IPD at moderate electric field region is measured with varying the previously applied electric field polarity. Based on the result, the effect of sequential change of an applied electric field polarity on the electrical characteristics is analyzed.