R. A. Rausch

Suggested Principles for the Control of Future Accelerators

The SPS at CERN has a control system which incorporates a number of features which were novel at the time of its design 1). This system has been in use for the commissioning and operation of the accelerator and its experimental areas over the last three years, during which time considerable experience has been gained, and some modifications and changes have been made 2). Some of the principles have been adopted for subsequent control systems for accelerators and other processes, with various modifications to suit the particular circumstances. The purpose of this paper is to combine this experience with the predicted trends in microprocessor electronics to suggest a direction in which the design of control systems for large processes of this type may go. We will start with a brief description of the main features of the present system.

A Multiprocessor Bus Architecture for the LEP Control System

The architecture and the system aspects of the multi-master bus used for the construction of the process computer assemblies and the message handling assemblies of the LEP control system are presented. This bus architecture provides a fully distributed reservation mechanism and a protected access of the peripherals to prevent processor interferences. To achieve this, a channel concept is proposed, using a system bus for communication between processors and with their peripherals. The architecture is microprocessor independent, provides dynamic bus allocation amongst several microcomputers, offers processor position independence and has a multimaster bus extension to several crates with a homogeneous addressing. A global system concept, called E3S, has been developed including the definition of software primitives. The bus access software is organised in a layered structure matching the module functionality.

Accelerator Control Systems without Minicomputers

A paper given last year described in general terms a plan for the control of a large machine using assemblies of microcomputer units which simulate a conventional minicomputer by multiprocessing. In every other way the SPS control philosophy is followed. The design of a model assembly has allowed us to learn something about the protocols needed inside and between assemblies, as well as to assess more accurately what level of technology it is reasonable to apply. In any control system of this kind it would be desirable to allow engineering contributions from a variety of sources, and yet ensure the homogeneity needed for the system to remain reliable and comprehensible. Methods of achieving this are discussed.

The Message Architecture of the LEP Control System

The LEP control system will be constructed as a global communication system where microprocessors will be used everywhere, from the management of the communication mechanisms, the execution of complex control procedures, and the supervision of the equipment. To achieve this, the global control problem has been cut into sizeable functions which will be encapsulated into microprocessor modules containing enough hardware for the function to be mostly self-contained. This leads to a function architecture where messages are exchanged between the functions on miscellaneous media. It will be shown how these message exchanges can be organized into a uniform flow of data all through the system.