R. F. W. Pease

High-performance heat sinking for VLSI

The problem of achieving compact, high-performance forced liquid cooling of planar integrated circuits has been investigated. The convective heat-transfer coefficient h between the substrate and the coolant was found to be the primary impediment to achieving low thermal resistance. For laminar flow in confined channels, h scales inversely with channel width, making microscopic channels desirable. The coolant viscosity determines the minimum practical channel width. The use of high-aspect ratio channels to increase surface area will, to an extent, further reduce thermal resistance. Based on these considerations, a new, very compact, water-cooled integral heat sink for silicon integrated circuits has been designed and tested. At a power density of 790 W/cm2, a maximum substrate temperature rise of 71°C above the input water temperature was measured, in good agreement with theory. By allowing such high power densities, the heat sink may greatly enhance the feasibility of ultrahigh-speed VLSI circuits.

Lithography and Other Patterning Techniques for Future Electronics

For all technologies, from flint arrowheads to DNA microarrays, patterning the functional material is crucial. For semiconductor integrated circuits (ICs), it is even more critical than for most technologies because enormous benefits accrue to going smaller, notably higher speed and much less energy consumed per computing function. The consensus is that ICs will continue to be manufactured until at least the ldquo22 nm noderdquo (the linewidth of an equal line-space pattern). Most patterning of ICs takes place on the wafer in two steps: (a) lithography, the patterning of a resist film on top of the functional material; and (b) transferring the resist pattern into the functional material, usually by etching. Here we concentrate on lithography. Optics has continued to be the chosen lithographic route despite its continually forecast demise. A combination of 193-nm radiation, immersion optics, and computer-intensive resolution enhancement technology will probably be used for the 45- and 32-nm nodes. Optical lithography usually requires that we first make a mask and then project the mask pattern onto a resist-coated wafer. Making a qualified mask, although originally dismissed as a ldquosupport technology,rdquo now represents a significant fraction of the total cost of patterning an IC largely because of the measures needed to push resolution so far beyond the normal limit of optical resolution. Thus, although optics has demonstrated features well below 22 nm, it is not clear that optics will be the most economical in this range; nanometer-scale mechanical printing is a strong contender, extreme ultraviolet is still the official front runner, and electron beam lithography, which has demonstrated minimum features less than 10 nm wide, continues to be developed both for mask making and for directly writing on the wafer (also known as ldquomaskless lithographyrdquo). Going from laboratory demonstration to manufacturing technology is enormously expensive (

Self‐limiting oxidation for fabricating sub‐5 nm silicon nanowires

1 billion) and for good reason. Just in terms of data rate (mask pattern to resist pattern), todays exposure tools achieve about 10 Tb/s at an allowable error rate of about 1/h; this data rate will double with each generation. In addition, the edge placement precision required will soon be 30 parts per billion. There are so many opportunities for unacceptable performance that making the right decision goes far beyond understanding the underlying physical principles. But the benefits of continuing to be able to manufacture electronics at the 22-nm node and beyond appear to justify the investment, and there is no shortage of ideas on how to accomplish this.

Self‐limiting oxidation of Si nanowires

The ability to control structural dimensions below 5 nm is essential for a systematic study of the optical and electrical properties of Si nanostructures. A combination of electron beam lithography, NF3 reactive ion etching, and dry thermal oxidation has been successfully implemented to yield 2‐nm‐wide Si nanowires with aspect ratio of more than 100 to 1. With a sideview transmission electron microscopy technique, the oxidation progression of Si nanowires was characterized over a range of temperature from 800 to 1200 °C. A previously reported self‐limiting oxidation phenomenon was found to occur only for oxidation temperatures below 950 °C. A preliminary model suggests that increase in the activation energy of oxidant diffusivity in a highly stressed oxide may be the main mechanism for slowing down the oxidation rate in the self‐limiting regime.

Submicron patterning of thin cobalt films for magnetic storage

Achieving tolerances of the order of 1 nm for sub‐10 nm structures is both challenging and necessary for controlled experiments on such structures. Here the use of a self‐limiting oxidation reaction to yield silicon (Si) wires of less than 10 nm diam with a tolerance of ±1 nm over 0.5 μm. The final self‐limiting diameters were found to be controlled by oxidation temperature. For 30 nm initial Si column diameters, the asymptotic diameters were found to be 11 and 6 nm for dry oxidation at 800 and 850 °C, respectively. The mechanism of the self‐limiting reaction is not yet fully understood but the tiny radius of curvature is obviously a factor. In addition, there appears to be an anomalous loss of Si; this may be due to sublimation of SiO.

Electron beam lithography

We are investigating the feasibility of a recording medium in which each bit of information is stored in a single‐domain magnetic particle. To this end we have developed a procedure for high‐resolution patterning of magnetic recording films using direct write electron‐beam lithography and a multistep sputter etching process. We have used this procedure to define small islands of polycrystalline magnetic thin film with feature sizes down to 0.1 μm. The patterning process is suitable for many different kinds of magnetic films, including single‐crystal epitaxially grown films, and is designed to minimize physical and chemical damage to the magnetic material being patterned. Both atomic force microscopy and x‐ray photoemission spectroscopy have been used to establish that the magnetic islands patterned using this process are physically isolated from each other.

Imaging and modification of polymers by scanning tunneling and atomic force microscopy

Abstract Electron beam lithography means writing patterns in thin films of electron sensitive material using a finely focused (sub-micrometre diameter) electron beam. By combining electrical scanning with interferometrically monitored mechanical motion, very complex patterns can be generated with great accuracy; for example, a pattern containing one-micrometre features can extend over 100 mm with a positional accuracy of 025 μm. In the manufacture of integrated circuits this technique is used for generating masks which are then projected optically onto silicon wafers which are coated with photosensitive resists. For making circuits with sub-micrometre features the resist-coated wafer can be exposed directly with the electron beam; however this is slow because the electron beam exposure is point-by-point and there are limits to electron beam intensity and resist sensitivity. Overcoming this limit is possible using techniques which allow the exposure of many points simultaneously but such techniques are not...

Lithography with the scanning tunneling microscope

Direct imaging of ultrathin organic films on solid surfaces is important for a variety of reasons; in particular, the use of such films as ultrathin resists for nanometer scale fabrication and information recording requires that we understand their microstrucure. We have used the Langmuir–Blodgett technique to prepare monolayer and submonolayer films of poly(octadecylacrylate) (PODA) and poly(methylmethacrylate) (PMMA) on graphite substrates. Atomic scale images obtained with the scanning tunneling microscope (STM) and the atomic force microscope of the PODA films showed a variety of structures, including isolated narrow fibrils, parallel groups of fibrils, and an ordered structure consistent with the side chain crystallization expected with that material. The fibrils observed are interpreted as individual polymer chains or small bundles of parallel chains. Images of the PMMA samples show no ordered regions. By applying voltage pulses on the STM tip, we were able to locally modify and apparently cut throu...

Lift‐off metallization using poly(methyl methacrylate) exposed with a scanning tunneling microscope

In a recent paper [McCord and Pease, J. Vac. Sci. Technol. B 3, 198 (1985)] we described how it should be possible to generate, for lithography and other materials processing, an electron beam with an extraordinary combination of high current (>1 mA), low voltage (<100 V) and small diameter (<0.1 μm) using a modified scanning tunneling microscope (STM) operating in the field emission mode. To test this prediction we have built a modified STM onto the stage of a scanning electron microscope (SEM) so that we can monitor system geometry. The tip, an etched tungsten wire, can be manually moved in the z direction (normal to the target) for coarse motion and three PZT piezoelectric transducers allow 10 μm travel in the x, y, and z directions. A feedback system stabilizes the field emission current (and hence the tip‐to‐target spacing). We have obtained beams with currents from 1 nA to several microamps at voltages from 1 to 1000 V. We have used the beam to produce lines of contamination on a gold film; the cont...

Superconductors as very high-speed system-level interconnects

The scanning tunneling microscope (STM) is a unique tool for ultrahigh resolution, ultralow voltage electron beam lithography. In a previous paper we described the formation of metallic patterns by a ‘‘contamination’’ process followed by sputter etching. Here we report the formation of 22‐nm‐wide metal lines by STM exposure of poly(methyl methacrylate) (PMMA) resist followed by liftoff. Resist exposure and liftoff have also been achieved with reverse polarity, where the electrons are emitted from the resist sample and accelerated towards the tip. Results include the first working device made with a STM, a thin‐film resistor 2 μ long and 120 nm in width. In addition to lithographic applications, studying resists in this regime may offer new insights on the chemical process of resist exposure and the role played by secondary electrons in exposing resist. Our results indicate that PMMA only works as a negative resist for energies above 25 eV; below this value it appears that the electrons cannot cause suffic...