R.J. Mack

A hybrid genetic algorithm method for optimizing analog circuits

An approach is presented for the automated sizing of analog circuits based upon a combination of a genetic algorithm (GA) with a least squares (Gauss-Newton) gradient search. The method combines the global-search properties of the GA with the fast local convergence properties of the least squares method to produce a circuit design from random initial component values in a reduced time compared to the application of a direct GA method, or a restart least squares algorithm. Results are presented to demonstrate the application of the method in the design of both passive and active circuits.

AMODA: a flexible framework for automatic migration of analog macro designs using optimization techniques

A sophisticated software framework, AMODA, is presented for the automatic migration of analog macro designs between different manufacturing processes. This very important requirement for efficient design re-use is formulated as an optimization problem, while AMODA provides full flexibility in the problem formulation to achieve high efficiency and quality design. The examples demonstrate the effective design re-use techniques that are integrated into the framework.

Analog layout generation: from design assistant to automated layout

This paper describes the development of an automatic analog layout system, ALDA2. The focus is on the three key processes in the ALDA2 design: flow-partitioning, floorplanning and physical assembly. The system has been implemented in Prolog and interfaced to Cadence DFW2 CAD framework; this enables ALDA2 to carry out layout planning and then control standard framework tools for basic physical assembly tasks such as routing and compaction.

The application of temporal logic for flexible scheduling within a high-level synthesis system

An integrated approach for the automatic synthesis of a register transfer architecture from a behavioral description is presented. An internal representation is used based on modeling the temporal relationships between all operations in the specification. A two-phase design approach is presented: design pruning limits the design space through the application of design constraints while design selection produces a timing schedule meeting specific performance characteristics. The rule-based system described has been implemented in PROLOG on a Sun/4. The major advantage of the approach is its generality; unlike many systems, the design process does not operate in a fixed order but is flexible and constraint-oriented.<<ETX>>

The role of designer knowledge for circuit-level optimization within an analog synthesis system

This paper discusses techniques for circuit-level optimization within an analog synthesis system. Various strategies for adding designer knowledge to guide the optimization process are available-these range from rules for selecting design variables to use of design equations. An example is given of the strategies applied to a BJT VCO.

Analogue circuit design using the analogue design synthesis assistant (ADSA)

The analogue design synthesis assistant (ADSA) is presented as a tool for the automated design and optimisation of analogue integrated circuits. ADSA implements analogue design synthesis using optimisation within an abstraction-based design framework. The results demonstrate that ADSA assists analogue design synthesis from high-level descriptions to circuit-level designs.

A primary planner for high-level architectural synthesis

The authors present an integrated internal representation, a primary plan, as a basis for the automatic synthesis of a register transfer architecture from a behavioural description. The structure of a prototype synthesis system is presented, and the generation of the primary plan is discussed in detail. The system operates by adopting a hierarchical approach and transforming the initial abstract representation of the plan to a hardware structure which meets specified speed and hardware constraints. An example is given showing how different user constraints produce alternative architectures.<<ETX>>

A top-down methodology to accommodate circuit interaction within an analogue synthesis system

This paper describes a methodology for designing analog systems starting from a top-level, behavioral model. The methodology has been incorporated within an analog synthesis system (ADSA), which is based upon the use of optimization at both behavioral and circuit levels. Initial design uses ideal models without interaction. Model refinement takes place to accommodate, first, signal offsets and levels, and then, the source and load impedances of the circuit blocks. An example is given of the methodology applied to the design of a Downconverter.

A multi-level netlist partitioning approach to hierarchical layout design of analog ICs

An algorithmic netlist partitioning approach for the hierarchical design of analog layout is presented. In addition to considering routability, partitioning operates under analog performance and area efficiency constraints. The multi-level partitioner is embedded with built-in move operators to enable designers to balance quality and design time. The effectiveness of the approach is shown by example results.

A high-level approach to modeling nonlinear analog architectures

An automatic analog behavioral modeling system is described; the system operates hierarchically and first attempts to match library behavioral models to the transistor-level simulation response of the target circuit. If sufficient accuracy cannot be obtained with these standard models then bespoke template synthesis is carried out. A feature is a blend of polynomial approximation and table-based spline fitting dependent upon specified accuracy constraints. The operation of the system is illustrated with the implementation of the modeling of a bi-directional associative memory.