R. Tsai

Narrow channel 2-D MESFET for low power electronics

A 2-D MESFET utilizing sidewall Schottky contacts on either side of a very narrow 2-d electron gas channel is described. Record transconductance of 295 and 130 mS/mm have been achieved at room temperature in 1.0 and 0.5 micron wide devices, respectively. We also present accurate 2-D MESFET current-voltage and capacitance-voltage models. These models have been implemented into AIM-Spice which was used to simulate DCFL inverter and ring oscillator circuits. The ring oscillator simulations predict a power-delay product of less than 0.1 fJ/gate at room temperature, suggesting that the 2-D MESFET may be useful for ultra low power electronics applications. >

RTD/2-D MESFET logic element for compact, ultra-low-power electronics

We describe compact and highly functional logic elements utilizing a two-dimensional (2-D) MESFET with a resonant tunneling diode load. The 2-D MESFET uses two lateral Schottky gate contacts to modulate the width of the 2-D electron gas layer. The novel contact geometry results in reduced gate capacitance, ultra-low-power performance, and the elimination of the Narrow Channel Effect (NCE) compared to conventional HFETs or MESFETs. The advantage of using an RTD as the load device is the reduction of the static power consumption at the logical high input level. We demonstrate low-power RTD/2-D MESFET inverter operation as well as compact NAND and NOR gates using a single RTD/2-D MESFET pair. We also present optimized inverter elements and estimate from SPICE simulations the power-delay products of RTD/2-D MESFET ring oscillators. Compared to recently reported values for CMOS on SOI, the RTD/2-D MESFET technology is expected to exhibit one order of magnitude less active power dissipation and a factor of 3 lower power-delay product.

Sub-half-micrometer width 2-D MESFET

Two-dimensional (2-D) MESFETs having sub-half-micron channel widths have been fabricated on double-/spl delta/-doped Al/sub 0.24/Ga/sub 0.76/As/In/sub 0.18/Ga/sub 0.82/As/GaAs heterostructures. The 2-D MESFET operates like a normal transistor at room temperature but uses very few electrons in the channel (about 500 at peak current and 5 at threshold). Also, the Narrow Channel Effect (NCE) and Drain-Induced Barrier Lowering (DIBL) (two effects which limit the minimum power operation in conventional devices) have been practically eliminated. The 0.4 micron wide device had an ON/OFF current ratio of 10/sup 5/, a peak transconductance of 100 mS/mm, a threshold voltage of 0.3 V, a saturation voltage of 0.2 V, and a subthreshold ideality factor of 1.1. The 2-D MESFET DCFL inverter had a switching voltage and noise margin of 0.35 V and 0.26 V, respectively, at 0.8 V supply. These room temperature results suggest that the 2-D MESFET is an excellent candidate for future low power digital electronics applications.

The optoelectronic response of a laterally contacted 2-D MESFET

We describe the photoelectric response of a Two-Dimensional Metal Semiconductor-Field-Effect-Transistor (2-D MESFET) which utilizes laterally contacting gates to the active region. The use of lateral gates allows direct illumination of the conductive channel from the top. Photogains as high as 2.4/spl times/10/sup 7/ have been measured at 0.7 /spl mu/m wavelength and 26 /spl mu/W/cm/sup 2/ optical power intensity. Broad spectral responses from 0.7 /spl mu/m to 1.06 /spl mu/m are also presented. The new feature of this device is a spectral response which can be tuned by the applied gate bias and also a higher responsivity which is related to the top illumination unimpeded by the top gate.

High-temperature characteristics of 2-D MESFETs

Experimental data of 2-D MESFETs, which utilize sidewall Schottky contacts to degenerate two-dimensional electron gas, indicate a much weaker temperature dependence of the drain current compared to conventional MESFETs in the temperature range from 25-150/spl deg/C. Measured drain current characteristics show that the 2-D MESFET structure exhibits negligible threshold voltage shift with temperature in this temperature range. The negligible threshold voltage shift can be explained in terms of a nearly temperature independent built-in voltage related to the degeneracy of the two-dimensional electron gas. Furthermore, the low-field mobility extracted from the measured transconductance exhibits a smaller degradation with increasing temperature compared to conventional MESFETs. For our devices, the mobility drops by approximately 25% over the temperature range 25-125/spl deg/C, compared to 40-50% for conventional MESFETs. The smaller temperature variations of the low-field mobility are linked to a more effective screening of impurity scattering by the two-dimensional electron gas.

Heterodimensional technology for ultra low power electronics

We describe new heterodimensional technology suitable for ultra low power applications. This technology uses Schottky barrier contacts between three-dimensional metal and two-dimensional electron gas. The low power performance is due to the following: the small capacitance of the 2D-3D junction; the concentration of the depletion layer electric field streamlines in the active channel; suppression of parasitic resistance; small leakage current; and, most of all, due to the total elimination of the narrow channel effect which allows us to scale the device width to submicron dimensions. We present, compare, and discuss measured and simulated I-V and C-V characteristics for the 2D-3D Schottky diode, 2D MESFET and Schottky Gated 2D-3D RTT.

Scaling of two dimensional MESFETs for ultra low power applications

Presents new experimental data and simulations of AlGaAs/InGaAs/GaAs two dimensional MESFETs (2D MESFETs) which utilize sidewall Schottky contacts on either side of a very narrow 2D electron gas channel. These devices demonstrate excellent scaling characteristics down to submicron dimensions in both the channel length and the width, which are attributed to the special geometry of the 2D-3D contacts suppressing both the narrow channel effect (NCE) and the drain induced barrier lowering (DIBL). Specifically, when the device was scaled from 1.0/spl times/1.0 /spl mu/m/sup 2/ to 0.8/spl times/0.5 /spl mu/m/sup 2/, output conductance was reduced from 40 mS/mm to less than 1 mS/mm, knee voltage was reduced from 0.75 V to 0.25 V, and the ideality factor was reduced from 1.3 to 1.08, while the threshold voltage became less negative from -0.5 V to 0.3 V as expected. An excellent source-drain breakdown voltage over 10 V, and a current ON/OFF ratio over 105 were also observed. The gate leakage current remains small up to 0.6 V gate bias, demonstrating a good Schottky barrier between the side gates and the 2D electron gas. These characteristics compare favorably with those of a conventional HFET with similar dimensions.

Breakdown behavior of low-power pseudomorphic AlGaAs/InGaAs 2-D MESFET's

We report the breakdown behavior of the two-dimensional (2-D) MESFET, which is a low-power heterodimensional transistor having dual side gates that contact the edge of the two-dimensional electron gas (2-DEG) channel in a double-side planar-doped pseudomorphic Al/sub 0.24/Ga/sub 0.76/As/In/sub 0.17/Ga/sub 0.83/As material structure. Low output conductance (less than 6 mS/mm for V/sub GS/=0 V) and low gate leakage current (less than 100 nA) are measured out to a drain-source bias of 20 V, indicating that the effects of impact ionization are reduced in the 2-D MESFET. Excellent off-state drain-source and drain-gate breakdown voltages are experimentally measured to be 20 and 21 V, respectively. We attribute these high breakdown values to the electric and geometric properties of the heterodimensional Schottky metal/2-DEG junction.