Raj N. Master

Impact of usage conditions on solder joint fatigue life

In flip chip microelectronic packages, solder bumps are used to connect the silicon die and package substrate for electrical functionality. However, due to the large mismatch of silicon and organic package in the coefficient of thermal expansion (CTE), the solder bumps undergo large viscoplastic deformation in temperature cycling test and in field operation. The viscoplastic damage accumulates cycle by cycle, which leads to the bump failure by fatigue cracking after hundreds or thousands of thermal cycles. Underfill plays a key role in solder joint fatigue lifetime. In addition to the effects of underfill modulus and CTE, the glass transition temperature, Tg, is also critical. Solder deformation is very sensitive to underfill modulus, the viscoplastic work is much larger when the temperature is above Tg than below Tg. The underfill is usually chosen such that Tg is compatible with the operation temperature of processors, since its overall integrity can be optimized in terms of solder joint fatigue, underfill delamination and copper/low-k cracking. However, in usage, the junction temperature Tj could potentially overshoot Tg several degrees for several minutes. This situation will compromise the load-sharing ability of the underfill to protect the solder joints. The fatigue life of solder could be significantly impacted. In this paper, the effects of overshoot duration and the ramp rate are studied by modeling/simulation for both temperature cycling and power cycling tests, and compared with normal setpoint condition. Then, the field lifetime of solder joints is projected based on the simulation and the temperature cycling qualification test.

Transient Frequency-Domain Thermal Measurements With Applications to Electronic Packaging

Non-uniform power distribution, increased die-size, and multiple-chip modules present new challenges for the thermal management of modern integrated circuit (IC) packages. Thermal characterization techniques capable of resolving partial thermal resistances at the component level have received increased emphasis in development of advanced packaging technologies. This paper aims to develop a practical method for thermal characterization of IC packages using the frequency-domain measurement technique as a complementary technique to the widely used time-domain thermal transient measurement technique. This paper discusses practical implementation of the technique and demonstrates both thermal modeling and experimental results. Thermal impedances measured in frequency-domain yield the structure function, which describes the dynamic thermal response of the device based on thermal RC network analysis. Various applications of this technique in thermal characterization of the IC packages subjected to field conditions are also discussed.

Effect of glass transition slope of underfill on solder joint fatigue life

In flip chip microelectronic packages, solder bumps are used to connect the silicon die and package substrate for electrical functionality. However, due to the large mismatch of silicon and organic package in the coefficient of thermal expansion (CTE), the solder bumps undergo large viscoplastic deformation in temperature cycling test and in field operation. The viscoplastic damage accumulates cycle by cycle, which leads to the bump failure by fatigue cracking after hundreds or thousands of thermal cycles. Underfill plays a key role in solder joint fatigue lifetime. Besides the effects of underfill modulus, CTE, and the glass transition temperature Tg, the slope of temperature-dependent modulus curve in the range of glass transition is also critical. Since the solder deformation is very sensitive to underfill modulus, the viscoplastic work is much larger when the temperature is above Tg than below Tg.