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Dive into the research topics where Rajendra D. Pendse is active.

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IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B | 1994

Demountable TAB-a new path for TAB technology

Rajendra D. Pendse; Bahram Afshari; Bruce Heflinger; Farid Matta; Vivek Rastogi

Despite its advantages, the proliferation of TAB technology in the high lead count single chip packaging world has been somewhat limited by factors such as high entry cost and complex board-level assembly methods. In the area of MCMs, the difficulty of rework/repair of TAB emerges as a serious limiter. The TAB package developed at Hewlett-Packard addresses these very issues by providing bumpless inner lead bonding and demountable outer lead connection (hence called Demountable TAB, or DTAB). In the present paper, a comprehensive compilation of the DTAB packaging scheme is presented. The package construction, assembly procedure, PC board design considerations, thermal performance, electrical characterization and reliability testing are presented in detail. >


IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A | 1994

Reliability of area array pressure contacts on the DTAB package

Marcos Karnezos; Rajendra D. Pendse; Bahram Afshari; Farid Matta; Kenneth D. Scholz

Pressure contacts using noble metals have been in use for a long time. The contact metallurgy, the design, and the reliability are well understood and proven in a variety of applications, including relays, connectors, sockets, and other separable contacts. Pressure contacts in VLSI package applications are rather new. The large number of contacts at fine pitch and operation at high frequency and power present problems in design, materials, and reliability not encountered in other applications. Demountable TAB (DTAB) is a VLSI package, developed and qualified for high performance (/spl Gt/100 MHz), high pincount (>400) ASICs with higher power dissipation (/spl sim/40 W). It is a TAB-based package that utilizes area array, gold-to-gold pressure contacts to connect the tape to the printed circuit board, instead of the conventional reflowed solder joints. Extensive reliability testing has been used to optimize the design as well as to qualify the package for product applications. The formal tests have been extended beyond the industry standards to include system level tests, designed to stress the pressure contact under conditions not expected from other equivalent packages. Testing during the development phase revealed failure mechanisms that relate to the mechanical design of the spring system that maintains the force on the contacts; materials relaxation over extended periods of time under severe environmental conditions; and creep deformation of the printed circuit board under uneven distribution of clamping forces. Testing has also revealed that this package produces very high reliability sealed contacts, although thin gold of 5 /spl mu/in thickness is used instead of the 50-/spl mu/in thickness conventionally required by other applications. The test and testing methodology are discussed; the results and the failure modes and analysis are presented. The design changes and materials used to eliminate the failures are described. >


electronic components and technology conference | 1993

Reliability qualification of a demountable packaging technology

Farid Matta; Brahram Afshari; Rajendra D. Pendse; M. Karnezos

Demountable TAB (or DTAB) is a detachable, solderless, IC packaging technology based on using separable pressure contacts directly between the package and the substrate (e.g. PC board). Developmental reliability testing was used as a principal tool in the engineering of DTAB. Nevertheless, upon completion of the development effort, the technology was required to pass a formal qualification with pre-set sample sizes, strife conditions, and allowable failure rates. Because of the fundamental differences between DTAB and conventional packages, new approaches were required in the design of the tests and test protocols. The qualification vehicle was a 432-lead package containing a 14-mm sq. chip and a 48-mm sq. TAB frame, both designed specifically for the purpose. The qualification program consisted of two distinct batteries of tests, one for the package, and the other for the package-to-board contacts.<<ETX>>


international electronics manufacturing technology symposium | 1991

Demountable TAB: improving manufacturability of TAB

Brahram Afshari; Bruce Heflinger; Farid Matta; Rajendra D. Pendse

Area array demountable tape automated bonding (DTAB), a novel demountable, high-performance TAB package, is discussed. Special features of this package, its advantages compared to pin grid arrays (PGA), and its performance characteristics are presented. The basic concept for the package is introduced, and the advantages of this package in the manufacturing of printed circuit assemblies are discussed. Also the design of the package from the design for manufacturability point of view is explained.<<ETX>>


Archive | 1998

Cost effective structure and method for interconnecting a flip chip with a substrate

Rajendra D. Pendse


Archive | 1995

Radially staggered bond pad arrangements for integrated circuit pad circuitry

Rajendra D. Pendse; Rita Horner


Archive | 1992

High pin count package for semiconductor device

Rajendra D. Pendse


Archive | 2001

Flip chip-in-leadframe package and process

Rajendra D. Pendse; Marcos Karnezos; Walter A. Bush


Archive | 1997

Apparatus and method for precise alignment of a ceramic module to a test apparatus

Rajendra D. Pendse; Jaime L. Del Campo


Archive | 1992

Integrated circuit demountable tab apparatus

Farid Matta; Kevin Douglas; Rajendra D. Pendse; Brahram Afshari; Kenneth D. Scholz

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