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Dive into the research topics where Rajendra V. Boppana is active.

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Featured researches published by Rajendra V. Boppana.


IEEE Transactions on Computers | 1995

Fault-tolerant wormhole routing algorithms for mesh networks

Rajendra V. Boppana; Suresh Chalasani

We present simple methods to enhance the current minimal wormhole routing algorithms developed for high radix, low dimensional mesh networks for fault tolerant routing. We consider arbitrarily located faulty blocks and assume only local knowledge of faults. Messages are routed minimally when not blocked by faults and this constraint is relaxed to route around faults. The key concept we use is a fault ring consisting of fault free nodes and links can be formed around each fault region. Our fault tolerant techniques use these fault rings to route messages around fault regions. We show that, using just one extra virtual channel per physical channel, the well known e cube algorithm can be used to provide deadlock free routing in networks with nonoverlapping fault rings; there is no restriction on the number of faults. For the more complex faults with overlapping fault rings, four virtual channels are used. We also prove that at most four additional virtual channels are sufficient to make fully adaptive algorithms tolerant to multiple faulty blocks in n dimensional meshes. All these algorithms are deadlock and livelock free. Further, we present simulation results for the e cube and a fully adaptive algorithm fortified with our fault tolerant routing techniques and show that good performance may be obtained with as many as 10% links faulty. >


mobile ad hoc networking and computing | 2001

A comparison of TCP performance over three routing protocols for mobile ad hoc networks

Thomas D. Dyer; Rajendra V. Boppana

We examine the performance of the TCP protocol for bulk-data transfers in mobile ad hoc networks (MANETs). We vary the number of TCP connections and compare the performances of three recently proposed on-demand (AODV and DSR) and adaptive proactive (ADV) routing algorithms. It has been shown in the literature that the congestion control mechanism of TCP reacts adversely to packet losses due to temporarily broken routes in wireless networks. So, we prospose a simple heuristic, called fixed RTO, to distinguish between route loss and network congestion and thereby improve the performance of the routing algorithms. Using the ns-2 simulator, we evaluate the performances of the three routing algorithms with the standard TCP Reno protocol and Reno with fixed RTO. Our results indicate that the proactive ADV algorithm performs well under a variety of conditions and that the fixed RTO technique improves the performances of the two on-demand algorithms significantly


international symposium on computer architecture | 1993

A comparison of adaptive wormhole routing algorithms

Rajendra V. Boppana; Suresh Chalasani

Improvement of message latency and network utilization in torus interconnection networks by increasing adaptivity in wormhole routing algorithms is studied. A recently proposed partially adaptive algorithm and four new fully-adaptive routing algorithms are compared with the well-known e-cube algorithm for uniform, hotspot, and local traffic patterns. Our simulations indicate that the partially adaptive north-last algorithm, which causes unbalanced traffic in the network, performs worse than the nonadaptive e-cube routing algorithm for all three traffic patterns. Another result of our study is that the performance does not necessarily improve with full-adaptivity. In particular, a commonly discussed fully-adaptive routing algorithm, which uses 2n virtual channels per physical channel of a k-ary n-cube, performs worse than e-cube for uniform and hotspot traffic patterns. The other three fully-adaptive algorithms, which give priority to messages based on distances traveled, perform much better than the e-cube and partially-adaptive algorithms for all three traffic patterns. One of the conclusions of this study is that adaptivity, full or partial, is not necessarily a benefit in wormhole routing.


international conference on computer communications | 2001

An adaptive distance vector routing algorithm for mobile, ad hoc networks

Rajendra V. Boppana; Satyadeva P. Konduru

We present a new routing algorithm called adaptive distance vector (ADV) for mobile, ad hoc networks (MANETs). ADV is a distance vector routing algorithm that exhibits some on-demand characteristics by varying the frequency and the size of the routing updates in response to the network load and mobility conditions. Using simulations we show that ADV outperforms AODV and DSR especially in high mobility cases by giving significantly higher (50% or more) peak throughputs and lower packet delays. Furthermore, ADV uses fewer routing and control overhead packets than that of AODV and DSR, especially at moderate to high loads. Our results indicate the benefits of combining both proactive and on-demand routing techniques in designing suitable routing protocols for MANETs.


wireless communications and networking conference | 2005

Mitigating malicious control packet floods in ad hoc networks

Saman Desilva; Rajendra V. Boppana

We investigate the impact of hacker attacks by malicious nodes on the overall network performance. These malicious nodes mimic normal nodes in all aspects, except that they do route discoveries much more frequently than other nodes. We show, using simulations, that the basic route discovery mechanism used in many ad hoc network protocols can be exploited by as few as one malicious or compromised node to bring down throughput dramatically. We propose an adaptive statistical packet dropping mechanism to mitigate such situations and reduce the loss of throughput. The proposed mechanism works even when the identity of the malicious node is unknown and does not use any additional network bandwidth. It is simple to implement and maintains or improves network throughput when there are no malicious nodes, but the network is congested with excess traffic.


ieee international conference on high performance computing data and analytics | 2007

Finite Difference Time Domain (FDTD) Simulations Using Graphics Processors

Samuel Adams; Jason Payne; Rajendra V. Boppana

This paper presents a graphics processor based implementation of the Finite Difference Time Domain (FDTD), which uses a central finite differencing scheme for solving Maxwells equations for electromagnetics. FDTD simulations can be very computationally expensive and require thousands of CPU hours to solve on traditional general purpose processors. Modern Graphics Processing Units (GPUs) found in desktop computers are programmable and are capable of much higher vector floating-point performance than general purpose CPUs. This paper shows how GPUs can be used to greatly speedup FDTD simulations. The main objective is to leverage GPU processing power for FDTD update calculations and complete computationally expensive simulations in reasonable time. This allows researchers to simulate much longer pulse lengths and larger models than was possible in the past. A new FDTD code was developed to leverage graphics processors using Linux, C, OpenGL, Cg, and commodity GeForce 7 series GPUs. The graphics hardware was accessed through standard OpenGL. The FDTD model space was then transferred to the GPU device memory through OpenGL textures and host readable via frame buffer objects exposed by the OpenGL 2.0 application programming interface (API). GPU fragment processors were utilized for the FDTD update computations via Cg fragment programs. For models that were sufficiently large, greater than (140)3 cells, the GPU performed FDTD update calculations at least 12 times faster than the execution of the same simulation on a contemporary multicore CPU from Intel or AMD. The use of GPUs shows great promise for high performance computing applications like FDTD that have high arithmetic intensity and limited or no data dependencies in computation streams. Until recently, to use GPUs as a co-processor, the normalCPU-based code needed to be rewritten extensively using special graphics programming language Cg and OpenGL APIs, which is difficult for non-graphics programmers. However, newer GPUs, such as NVIDIAs G80, provide unified shaders models for programming GPU processing elements and APIs that allow compiler tools to allow direct programming of graphics hardware without extra intermediate graphics programming with OpenGL and Cg. Currently, a message passing interface-based parallel GPU FDTD code is being developed and benchmarked on a cluster of G80 GPUs.


IEEE Transactions on Parallel and Distributed Systems | 1998

Resource deadlocks and performance of wormhole multicast routing algorithms

Rajendra V. Boppana; Suresh Chalasani; Cauligi S. Raghavendra

We show that deadlocks due to dependencies on consumption channels are a fundamental problem in wormhole multicast routing. This type of resource deadlocks has not been addressed in many previously proposed wormhole multicast algorithms. We also show that deadlocks on consumption channels can be avoided by using multiple classes of consumption channels and restricting the use of consumption channels by multicast messages. We provide upper bounds for the number of consumption channels required to avoid deadlocks. In addition, we present a new multicast routing algorithm, column-path, which is based on the well-known dimension-order routing used in many multicomputers and multiprocessors. Therefore, this algorithm could be implemented in existing multicomputers with simple changes to the hardware. Using simulations, we compare the performance of the proposed column-path algorithm with the previously proposed Hamiltonian-path-based multipath and an e-cube-based multicast routing algorithms. Our results show that for multicast traffic, the column-path routing offers higher throughputs, while the multipath algorithm offers lower message latencies. Another result of our study is that the commonly implemented simplistic scheme of sending one copy of a multicast message to each of its destinations exhibits good performance provided the number of destinations is small.


IEEE Transactions on Parallel and Distributed Systems | 1996

A framework for designing deadlock-free wormhole routing algorithms

Rajendra V. Boppana; Suresh Chalasani

This paper presents a framework to design fully-adaptive, deadlock-free wormhole algorithms for a variety of network topologies. The main theoretical contributions are: (a) design of new wormhole algorithms using store-and-forward algorithms, (b) a sufficient condition for deadlock free routing by the wormhole algorithms so designed, and (c) a sufficient condition for deadlock free routing by these wormhole algorithms with centralized flit buffers shared among multiple channels. To illustrate the theory, several wormhole algorithms based on store-and-forward hop schemes are designed. The hop-based wormhole algorithms can be applied to a variety of networks including torus, mesh, de Brujin, and a class of Cayley networks, with the best known bounds on virtual channels for minimal routing on the last two classes of networks. An analysis of the resource requirements and performances of a proposed algorithm, called negative-hop algorithm, with some of the previously proposed algorithms for torus and mesh networks is presented.


IEEE Transactions on Computers | 1991

On self-routing in Benes and shuffle-exchange networks

Cauligi S. Raghavendra; Rajendra V. Boppana

The authors present self-routing algorithms for realizing the class of linear permutations in various multistage networks such as Benes and 2n-stage shuffle-exchange. Linear permutations are useful in providing fast access of data arrays. In the first half of the network, switches are set by comparing the destination tags at their inputs, and, in the second half, switches are set using the Omega self-routing algorithm. It is shown that the comparison operations can be implemented in bit-serial networks without loss of time. In contrast, with the well-known Benes network self-routing algorithm of D. Nassimi and S. Sahni (1981), switches are set by giving priority to the destination tag at the upper input to them. The algorithms presented are useful in providing fast access of various data patterns using interconnection networks cheaper than crossbars. >


international conference on supercomputing | 1994

Fault-tolerant wormhole routing in tori

Suresh Chalasani; Rajendra V. Boppana

We present a method to enhance wormhole routing algorithms for deadlock-free fault-tolerant routing in tori. We consider arbitrarily-located faulty blocks and assume only local knowledge of faults. Messages are routed via shortest paths when there are no faults, and this constraint is only slightly relaxed to facilitate routing in the presence of faults. The key concept we use is that, for each fault region, a fault ring consisting of fault free nodes and physical channels can be formed around it. These fault rings can be used to route messages around fault regions. We prove that at most four additional virtual channels are sufficient to make any fully-adaptive algorithm tolerant to multiple faulty blocks in torus networks. As an example of this technique, we present simulation results for a fully-adaptive algorithm and show that good performance can be obtained with as many as 10% links faulty.

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Suresh Chalasani

University of Wisconsin–Parkside

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Cauligi S. Raghavendra

University of Southern California

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Xu Su

University of Texas at San Antonio

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Thomas D. Dyer

University of Texas at San Antonio

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Saman Desilva

University of Texas at San Antonio

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Bob Badgett

University of Texas Health Science Center at San Antonio

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Jacqueline A. Pugh

University of Texas Health Science Center at San Antonio

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Jayavel Sounderpandian

University of Wisconsin–Parkside

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Satyadeva P. Konduru

University of Texas at San Antonio

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