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Dive into the research topics where Ramesh K. Pokharel is active.

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Featured researches published by Ramesh K. Pokharel.


IEEE Microwave and Wireless Components Letters | 2013

Energy Harvesting Circuit on a One-Sided Directional Flexible Antenna

Haruichi Kanaya; Shoichiro Tsukamaoto; Takuya Hirabaru; Daisuke Kanemoto; Ramesh K. Pokharel; Keiji Yoshida

The present letter describes the design of an energy harvesting circuit on a one-sided directional flexible planar antenna. The circuit is composed of a flexible antenna with an impedance matching circuit, a resonant circuit, and a booster circuit for converting and boosting radio frequency power into a dc voltage. The proposed one-sided directional flexible antenna has a bottom floating metal layer that enables one-sided radiation and easy connection of the booster circuit to the metal layer. The simulated output dc voltage is 2.89 V for an input of 100 mV and a 50 Ω power source at 900 MHz, and power efficiency is 58.7% for 1.0 × 107 Ω load resistance.


IEEE Microwave and Wireless Components Letters | 2009

Low Noise Wide Tuning Range Quadrature Ring Oscillator for Multi-Standard Transceiver

O. Nizhnik; Ramesh K. Pokharel; Haruichi Kanaya; Keiji Yoshida

This letter presents a low phase noise quadrature ring oscillator with new start-up circuit. The oscillator architecture is a two-stage differential ring with an additional pair of transition-assistance transistors. The circuit was implemented in 0.18 mum CMOS technology and the measured tuning range of the prototype device is from 1.7 GHz to 5.5 GHz and figure of merit (FOM) is -162 dB. The proposed area of application is the core of the local oscillator in a multi-standard wireless transceiver.


IEEE Microwave and Wireless Components Letters | 2010

An Excellent Gain Flatness 3.0–7.0 GHz CMOS PA for UWB Applications

Sohiful Anuar Zainol Murad; Ramesh K. Pokharel; A. I. A. Galal; Rohana Sapawi; Haruichi Kanaya; Keiji Yoshida

This letter presents an excellent gain flatness CMOS power amplifier (PA) for UWB applications at 3.0-7.0 GHz in TSMC 0.18 μm CMOS technology. The UWB PA proposed here employs a current-reused technique to enhance the gain at the upper end of the desired band, a shunt and a series peaking inductors with a resistive feedback at the second stage to obtain the wider and flat gain, while shunt-shunt feedback helps to enhance the bandwidth and improve the output wideband matching. The measurement results indicated that the input return loss (S11) less than -6 dB, output return loss (S22) less than -7 dB, and excellent gain flatness approximately 14.5 ±0.5 dB over the frequency range of interest. The output 1 dB compression of 7 dBm, the output third-order intercept point (OIP3) of 18 dBm, and a phase linearity property (group delay) of ±178.5 ps across the whole band were obtained with a power consumption of 24 mW.


IEEE Microwave and Wireless Components Letters | 2012

Low Group Delay 3.1–10.6 GHz CMOS Power Amplifier for UWB Applications

Rohana Sapawi; Ramesh K. Pokharel; Sohiful Anuar Zainol Murad; Awinash Anand; Nishal Koirala; Haruichi Kanaya; Keiji Yoshida

This letter proposes the design of a low group delay ultra-wideband (UWB) power amplifier (PA) in CMOS technology. The PA design employs a three-stage cascade common source topology that has a different design concept from other multi-stage topology to provide a broad bandwidth characteristic, gain flatness of , and low group delay variation of . A resistive shunt feedback technique is adopted at the first stage of the amplifier to achieve good input matching, which controls the upper frequency of the UWB system. The third stage realizes the gain at the lower corner frequency and the second stage is used to smooth the flatness of the gain curve. By using this method, the proposed design has the lowest group delay variation among the recently reported CMOS PAs for 3.1 to 10.6 GHz applications.


IEEE Transactions on Electromagnetic Compatibility | 2007

Applications of Time-Domain Numerical Electromagnetic Code to Lightning Surge Analysis

Ramesh K. Pokharel; Masaru Ishii

Recently, applications of 3-D numerical electromagnetic analysis have been increasing either for lightning electromagnetic impulse (LEMP) studies or lightning surge analyses on transmission and distribution lines. This paper is mainly concerned with the use of time- and frequency-domain codes for electromagnetic analysis of lightning surges. The thin-wire in time-domain (TWTD) code and numerical electromagnetic code (NEC-2) in the frequency domain based on the method of moments are chosen for comparative studies. The accuracy of TWTD code in the analysis of lightning surge characteristics of a double-circuit transmission tower is first investigated by comparing the computed results with the measured results on a reduced-scale tower model, computed results by NEC-2 on a full-scale tower model, and those computed by electromagnetic transients program. In the latter part of the paper, a switch model is combined with the TWTD code, and its applicability in analyzing the lightning surge characteristics of a transmission tower equipped with a surge arrester or in analyzing lightning-induced voltage on an overhead line is demonstrated.


IEEE Transactions on Applied Superconductivity | 2007

Electrically Small Superconducting Antennas With Bandpass Filters

S. Oda; S. Sakaguchi; Haruichi Kanaya; Ramesh K. Pokharel; Keiji Yoshida

In order to reduce the size of a wireless system, we have proposed the design formulas for an electrically small antenna (ESA), i.e. an antenna whose dimension is much smaller than a wavelength, with a miniaturized matching circuit which connects to a 50 Omega external circuit. Theoretical performances of the slot dipole antenna with the impedance matching circuit designed by the present theory are studied by the electrical circuits using transmission lines (transmission line model) as well as the electromagnetic (EM) field simulator. We designed a slot dipole antenna with the aid of the simulations using the electrical circuits as well as the EM field simulator. The size of the designed antenna including the matching circuit is 4.1 mm times 1.9 mm on MgO substrate with relative permittivity of 9.6 at the center frequency of 5 GHz, and the designed fractional bandwidth is 13% @RL (return loss) = -3 dB. In order to demonstrate the theory, we also carried out experiments on the slot dipole antenna with the matching circuits of pole number n = 2 using high temperature superconductors YBCO on MgO substrates in the 5 GHz band.


IEEE Transactions on Electromagnetic Compatibility | 2005

Analytical study on change of temperature and absorption characteristics of a single-Layer radiowave absorber under irradiation electric power

Ryosuke Suga; Osamu Hashimoto; Ramesh K. Pokharel; Kouji Wada; Shinya Watanabe

Radiowave absorbers are frequently used in high power applications, such as radar sites, and the rise of temperature of the absorber has often become a matter of concern. In this paper, the finite-difference time-domain (FDTD) method combined with the heat transport equation (HTE), also known as the FDTD-HTE method, which has been widely used in the analysis of microwave heating or temperature increase in the human head due to portable phones, is used in the analysis of the wave absorption characteristics of a single-layer wave absorber. The complex permittivity of a sample made of epoxy resin, measured by a cavity-resonator method when the sample is irradiated by a high power field for different irradiation times, is used in the analysis, and the wave absorption characteristics of the absorber under investigation highly depend on the input power and irradiation time of the high power field.


international symposium on electromagnetic compatibility | 2005

Effectiveness of electromagnetic wave absorbers to improve 5.8 GHz DSRC EM environment inside tunnel

Ramesh K. Pokharel; Hirotomo Ichinose; Osamu Hashimoto; Makoto Toyota; Itoji Sameda; Kouji Wada

Electromagnetic (EM) wave absorbers have been used to improve the EM environment of an electronic toll collection (ETC) system on an express highway or a wireless local area network (LAN) system in an indoor environment. In this paper, an efficient multi-ray propagation model, which uses a combination of image technique and grid approach to trace multiple signal rays from transmitter to receiver, is employed to analyze the EM environment of a dedicated short-range communication (DSRC) system inside tunnel. The validity of the model employed is discussed by the comparison with the results obtained by an experiment inside tunnel.


topical meeting on silicon monolithic integrated circuits in rf systems | 2010

Ultra-wideband low noise amplifier with shunt resistive feedback in 0.18µm CMOS process

A. I. A. Galal; Ramesh K. Pokharel; Haruichi Kanay; Keiji Yoshida

A CMOS low noise amplifier (LNA) for ultra-wideband (UWB) systems is presented. The proposed LNA achieve wide operating bandwidth for 3–10.6 GHz by using resistive shunt feedback topology. Two stage amplifiers and an inter stage circuit are designed to achieve wider gain bandwidth. The shunt resistive feedback are employed in input and output stage to provide wideband input matching with low noise figure (NF). This work is designed and fabricated in TSMC 0.18µm CMOS process. The proposed UWB LNA achieves a measured flat gain 15 dB and has a noise figure of 4 dB over the entire band while consuming 21.5 mW of power. The measured third order intercept point IIP3 is 2.5 dBm.


IEEE Transactions on Consumer Electronics | 2010

High efficiency, good linearity, and excellent phase linearity of 3.1-4.8 GHz CMOS UWB PA with a current-reused technique

Sohiful Anuar Zainol Murad; Ramesh K. Pokharel; Rohana Sapawi; Haruichi Kanaya; Keiji Yoshida

This paper describes the design of 3.1 to 4.8 GHz CMOS power amplifier (PA) for ultra-wideband (UWB) applications using 0.18-μm CMOS technology. The UWB PA proposed here employs cascode topology with a current-reused technique to enhance the gain at the upper end of the desired band, an inter-stage inductor, and a resistive feedback at the second stage to obtain the flatness gain. The measurement results indicated that the input return loss (S11) was less than -5 dB, output return loss (S22) was less than -8 dB, and average power gain of 10.3 dB with a flatness about 0.8 dB. The input 1 dB compression point about -2 dBm and excellent phase linearity (group delay) of ±135 ps across the whole band were obtained. Moreover, a very high power added efficiency (PAE) of 40.5% at 4 GHz with 50 Ω load impedance was achieved with a power consumption of 24-mW.

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Adel B. Abdel-Rahman

Egypt-Japan University of Science and Technology

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Adel Barakat

Jordan University of Science and Technology

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Ahmed Allam

Egypt-Japan University of Science and Technology

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