Ramesh Panwar

Reducing the frequency of tag compares for low power I-cache design

In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible for 20-25% of the power consumed in the Icache. Reducing the power consumed by the cache controller is important for low power I-cache design. We present three architectural modi cations, which in concert, allow us to reduce the cache controller activity to less than 2% for most applications. The rst modi cation involves comparing cache tags for only those instructions that result in fetches from a new cache block. The second modi cation involves the tagging of those branches that cause instructions to be fetched from a new cache block. The third modi cation involves augmenting the I-cache with a small on-chip memory called the S-cache. The most frequently executed basic blocks of code are statically allocated to the S-cache before program execution. We present empirical data to show the e ect that these modi cations have on the cache con-

Applying wavelet transforms with arithmetic coding to radiological image compression

Radiological archives need the images to be compressed at a moderate compression ratio between 10:1 to 20:1 while retaining good diagnostic quality. We have developed a compression algorithm based on discrete wavelet transforms (DWTs) and arithmetic coding (AC) that satisfies those requirements. This new method is superior to the previously developed full frame discrete cosine transform (FFDCT) method, as well as the industrial standard developed by the joint photographic expert group (JPEG). Since DWT is localized in both spatial and scale domains, the error due to quantization of coefficients does not propagate throughout the reconstructed picture as in FFDCT. Because it is a global transformation, it does not suffer the limitation of block transform methods such as JPEG. The severity of the error as measured by the normalized mean square error (NMSE) and maximum difference technique increases very slowly with compression ratio compared to the FFDCT. Normalized nearest neighbor difference (NNND), which is a measure of blockiness, stays approximately constant, while JPEG NNND increases rapidly with compression ratio. Furthermore, DWT has an efficient finite response filter FlR implementation that can be put in parallel hardware. DWT also offers total flexibility in the image format; the size of the image does not have to be a power of two as in the case of FFDCT. >

Volumetric image compression by 3D discrete wavelet transform (DWT)

The newly developed discrete wavelet transform (DWT) compression method is far superior to previous full frame discrete cosine transform (FFDCT) as well as industrial standard JPEG. Due to its localization properties both in spatial and transform domain, the quantization error introduced in DWT will not propagate globally as in FFDCT. Also DWT transform is a global technique that avoids the JPEG type block artifacts. As in all techniques, correlation among pixels makes compression possible. In volumetric image sets, such as CT and MR, inter-slice correlation can be exploited in addition to in-slice correlation. In this 3D DWT study, inter- slice correlation has also been investigated for CT and MR image set. Different numbers of slices are grouped together to perform wavelet transform in the transaxiale direction as a mean of testing relationship between correlation and compression efficiency. The 3D DWT is developed on UNIX platform. Significant higher compression ratio is achieved by compressing CT data as a volume versus one slice at a time. DWT is an excellent technique for exploiting inter-slice correlation to gain additional compression efficiency.

Input ordering for low power in CMOS logic gates

The inputs of a gate that are logically equivalent (for example, the inputs of a two-input NAND gate) can have different power consumption associated with signal switching at the inputs because of differences in circuit topology. Since the power consumed by the gate is dependent on the switching frequency of the input signals, the input order (assignment of signals to logically equivalent gate inputs) can be optimized for power by assigning the signal with the highest switching frequency to the gate input which has the lowest power consumption. A detailed analysis is presented with both analytic and empirical models to show the difference in the power consumption that results from input ordering for a two-input NAND gate. Empirical evidence indicates that power savings of up to 40% may be possible in two-input NAND gates, with the potential for greater savings in NAND and NOR gates with larger numbers of inputs.

Medical image supercomputing in a PACS infrastructure

A large scale global teleradiology project is underway linking multiple international imaging centers to the UCLA Department of Radiology. The goal is to deliver subspecialty consultation to patients in these remote areas. Technical issues in planning to establish the necessary teleradiology infrastructure include wide area network design, image compression, distributed archiving, and special viewing station features. Concepts such as teleconsultation and remote procedure monitoring are aimed at providing the same level of services at distant sites as that would be available in-house.

Lossless image compression using wavelet-like filter banks and arithmetic coding

We have developed a fast, reversible compression algorithm based on wavelet-like filter banks and arithmetic coding (AC) for primary diagnostic teleradiology using inexpensive, off-the- shelf hardwares. This new method offers routine 2:1 to 4:1 compression ratios, while it requires only a few seconds processing time on a microcomputer. This compression performance will make affordable primary diagnostic teleradiology over standard phone lines or ISDN possible.