Randall D Rettberg

The Monarch parallel processor hardware design

The Monarch architecture team took advantage of custom VLSI in the design of a shared-memory parallel processor. The simple structure eases the task of programming a massively parallel machine.<<ETX>>

Design of a user-microprogrammable building block

A user-microprogrammable computer has been developed for use as a building block in general-purpose and dedicated computer systems. The architecture is designed to be easily microprogrammed and features a 32-bit, vertically oriented microinstruction. The processor has a 135-nanosecond cycle time, either 16- or 20-bit macro data paths, and 1024 hardware registers. A significant fraction of the processor bandwidth may be budgeted for I/O processing to allow the substitution of microcode for expensive peripheral controllers. Furthermore, the micromachine is well suited to the emulation of other computer architectures in that it provides a large writable microcode memory and a minimum of special processor data paths. The design goals and strategies which determined the machine architecture are discussed, as well as an overview of the architecture and hardware organization. Finally, we report a number of specific applications developed to date.