Ratnadeep Paul

Effect of Thermal Deformation on Part Errors in Metal Powder Based Additive Manufacturing Processes

In metal additive manufacturing (AM) processes, parts are manufactured in layers by sintering or melting metal or metal alloy powder under the effect of a powerful laser or an electron beam. As the laser/electron beam scans the powder bed, it melts the powder in successive tracks which overlap each other. This overlap, called the hatch overlap, results in a continuous cycle of rapid melting and resolidification of the metal. The melting of the metal from powder to liquid and subsequent solidification causes anisotropic shrinkage in the layers. The thermal strains caused by the thermal gradients existing between the different layers and between the layers and the substrate leads to considerable thermal stresses in the part. As a result, stress gradients develop in the different directions of the part which lead to distortion and warpage in AM parts. The deformations due to shrinkage and thermal stresses have a significant effect on the dimensional inaccuracies of the final part. A three-dimensional thermomechanical finite element (FE) model has been developed in this paper which calculates the thermal deformation in AM parts based on slice thickness, part orientation, scanning speed, and material properties. The FE model has been validated and benchmarked with results already available in literature. The thermal deformation model is then superimposed with a geometric virtual manufacturing model of the AM process to calculate the form and runout errors in AM parts. Finally, the errors in the critical features of the AM parts calculated using the combined thermal deformation and geometric model are correlated with part orientation and slice thickness.

A new Steiner patch based file format for Additive Manufacturing processes

Additive Manufacturing (AM) processes adopt a layering approach for building parts in continuous slices and use the Standard Tessellation Language (STL) file format as an input to generate the slices during part manufacturing. However, the current STL format uses planar triangular facets to approximate the surfaces of the parts. This approximation introduces errors in the part representation which leads to additional errors downstream in the parts produced by AM processes. Recently, another file format called Additive Manufacturing File (AMF) was introduced by ASTM which seeks to use curved triangles based on second degree Hermite curves. However, while generating the slices for manufacturing the part, the curved triangles are recursively sub-divided back to planar triangles which may lead to the same approximation error present in the STL file. This paper introduces a new file format which uses curved Steiner patches instead of planar triangles for not only approximating the part surfaces but also for generating the slices. Steiner patches are bounded Roman surfaces and can be parametrically represented by rational Bezier equations. Since Steiner surfaces are of higher order, this new Steiner file format will have a better accuracy than the traditional STL and AMF formats and will lead to lower Geometric Dimensioning and Tolerancing (GD&T) errors in parts manufactured by AM processes. Since the intersection of a plane and the Steiner patch is a closed form mathematical solution, the slicing of the Steiner format can be accomplished with very little computational complexity. The Steiner representation has been used to approximate the surfaces of two test parts and the chordal errors in the surfaces are calculated. The chordal errors in the Steiner format are compared with the STL and AMF formats of the test surfaces and the results have been presented. Further, an error based adaptive tessellation algorithm is developed for generating the Steiner representation which reduces the number of curved facets while still improving the accuracy of the Steiner format. The test parts are virtually manufactured using the adaptive Steiner, STL and AMF format representations and the GD&T errors of the manufactured parts are calculated and compared. The results demonstrate that the modified Steiner format is able to significantly reduce the chordal and profile errors as compared to the STL and AMF formats. A new Steiner patch based Additive Manufacturing file format has been developed.Steiner format uses triangular rational Bezier representation of Steiner patches.Steiner format has high geometric fidelity and low approximation error.The Steiner patches can be easily sliced and closed form solutions can be obtained.AM parts manufactured using Steiner format has very low profile and form errors.

Increasing Part Accuracy in Additive Manufacturing Processes Using a k-d Tree Based Clustered Adaptive Layering

Additive manufacturing (AM) is widely used in aerospace, automobile, and medical industries for building highly accurate parts using a layer by layer approach. The stereolithography (STL) file is the standard file format used in AM machines and approximates the three-dimensional (3D) model of parts using planar triangles. However, as the STL file is an approximation of the actual computer aided design (CAD) surface, the geometric errors in the final manufactured parts are pronounced, particularly in those parts with highly curved surfaces. If the part is built with the minimum uniform layer thickness allowed by the AM machine, the manufactured part will typically have the best quality, but this will also result in a considerable increase in build time. Therefore, as a compromise, the part can be built with variable layer thicknesses, i.e., using an adaptive layering technique, which will reduce the part build time while still reducing the part errors and satisfying the geometric tolerance callouts on the part. This paper describes a new approach of determining the variable slices using a 3D k-d tree method. The paper validates the proposed k-d tree based adaptive layering approach for three test parts and documents the results by comparing the volumetric, cylindricity, sphericity, and profile errors obtained from this approach with those obtained using a uniform slicing method. Since current AM machines are incapable of handling adaptive slicing approach directly, a “pseudo” grouped adaptive layering approach is also proposed here. This “clustered slicing” technique will enable the fabrication of a part in bands of varying slice thicknesses with each band having clusters of uniform slice thicknesses. The proposed k-d tree based adaptive slicing approach along with clustered slicing has been validated with simulations of the test parts of different shapes.

A combined energy and error optimization method for metal powder based additive manufacturing processes

Purpose – The purpose of this paper is to develop a methodology to analyze the total sintering energy (TSE) required for manufacturing a part in metal powder-based additive manufacturing (AM) processes and optimize AM processes for minimizing total energy and form errors of AM parts while maximizing part strength. Design/methodology/approach – The paper uses a computational geometry approach to determine the TSE expended for manufacturing a metal AM part. The stereolithography (STL) file of a part is converted into a voxel data structure and the total sintering volume (TSV) is computed from the voxel representation. The TSE is then calculated from the TSV using the material property information of the metal powder. Findings – The TSE of an AM part is calculated for different slice thickness and part orientations, and the correlation of the total energy to these parameters is calculated. Using these correlations, the AM process is optimized to calculate the optimal values of slice thickness and part orient...

A Vertex Translation Algorithm for Adaptive Modification of STL File in Layered Manufacturing

Rapid Prototyping (RP)/Layered Manufacturing (LM) machines typically use a Stereolithography (STL) file as a basis to manufacture parts. However, the conversion of the part CAD file to STL results in the distortion of the part geometry, particularly if the part consists of freeform curved surfaces. Existing algorithms and software tend to reduce this distortion globally, which increases the size and memory requirements of the STL file. This paper presents a new approach for reducing the CAD to STL translation error locally, using chordal error as the criteria. The algorithm presented here compares the STL file to the design surface of the part, expressed as a NURBS surface, and computes the chordal error for multiple points on the STL facets. The point within each STL facet having the largest chordal error is modified to coincide with its corresponding point on the design surface. This replaces the original facet of the STL file with three new facets with significantly lower chordal error than that of the original facet. This Vertex Translation Algorithm (VTA), reduces the chordal error in areas with high curvature and areas having tighter profile tolerance specifications and provides the user the flexibility to selectively modify the STL file according to the tolerance requirements. The algorithm has been validated with the help of a test case.Copyright

Optimization of Automobile Assembly Process to Reduce Assembly Time

ABSTRACTThe automobile manufacturing industry is undergoing a significant restructuring. Every automaker is investing heavily for adapting new manufacturing processes as well as assembly techniques which will reduce the overall operating costs while consistently maintaining the quality of the product. In general, assembly lines are being designed and developed with a goal to synchronize workers, machines, tools and components. It is important to have an optimized assembly operation sequence in order to facilitate the smooth functioning of an assembly line. This research paper will focus on developing an optimal vehicle assembly sequence based on the liaisons and precedence graphs concepts [3, 5]. In general, a liaison establishes the connectivity between different components in an assembly based on their connectivity with respect to each other. Using the existing liaisons, multiple feasible precedence graphs can be generated which in turn lead to the development of multiple feasible assembly sequences. Th...

A Novel Additive Manufacturing File Format for Printed Electronics

Additive Manufacturing (AM) based Printed Electronics (PE) is an emerging technique where electronic components and interconnects are printed directly on substrates using a layered technique. The direct printing of the electronic components allows large scale and ultra-thin components to be printed on a wide variety of substrates including glass, silicon and plastic. These attributes make AM based Printed Electronics an invaluable manufacturing technique in the area of electronic sensors and sensor networks where thin, flexible and rugged form factors are very important. However, currently this technology is a labor intensive and manual process with the machine operator using his experience and judgment to slice the CAD file of the part to create 2D layers at different levels. This manual process increases the overall production time as well as the cost of the product and also results in inconsistent quality of parts.A major challenge faced by existing AM based Printed Electronics users for automating this process is the lack of a standard input file format that can be used by different PE machines for producing the components in layers. To leverage the capabilities of both AM and PE processes, a new file format based on the Constructive Solid Geometry (CSG) technique is proposed in this research paper. This file format data will not only include CAD data in the form of CSG primitives and Boolean representation but will also include manufacturing information related to the AM based PE process. The manufacturing information embedded within this new format will include data about the location of the different electronic components such as interconnects, resistors, capacitors, inductors, transistors, memory and substrate, and the materials required for the different components part. Different circuit board components will be represented as primitives or a combination of primitives obtained using CSG technique. In addition to the new file format, a slicing algorithm will also be developed which can be used to create the layers automatically using user inputs. The proposed file format and the slicing algorithm will be explained with the help of a case study.© 2013 ASME

A Translator for Converting CAD Models to Second Life

Product Life-cycle Management (PLM) has been one of the single most important techniques to have been developed in the manufacturing industry. The increasing capabilities of internet and the ever increasing dependence of business entities on internet have led to the development of metaverses — internet-based 3D virtual worlds — which act as business platforms where companies display and showcase their latest products and services. This is in turn has led to a demand for development of methods for the easy transfer of data from stand alone PLM systems to the internet based virtual worlds. This paper presents the development of a translator which will transfer product data of 3D models created in CAD systems to an internet based virtual world. This translator uses a faceted-surface approach to transfer the product information. In this work CAD models were converted to a CAD-neutral data format, JT file format, and finally recreated in the metaverse Second Life (SL). Examples of models translated from JT to SL have been presented. A technique known as prim optimization, which increases the efficiency of the translation was also incorporated in the algorithm for the translator. Examples of prim optimization have been provided in the paper.Copyright