Reinhard Petschacher

A 6-Bit/200-MHz Full Nyquist A/D Converter

This paper deals with the development of an extremely fast 6-bit flash A/D converter. To gain insight into the nature of speed limitations, the effects arising from operation at very high sampling rates have been investigated. This led to the implementation of an optimized double-stage comparator circuit. The chip has been fabricated in a fast standard oxide isolated bipolar process. At a sampling rate of 200 MHz, measurements show excellent dynamic performance (high signal-to-noise ratio, no error codes) up to input frequencies of 100 MHz.

A 10-b 75-MSPS subranging A/D converter with integrated sample and hold

The design of a fully differential two-step analog-to-digital converter (ADC) is presented. A sample-and-hold (S/H) circuit based on a unity-gain feedback amplifier, flash ADCs driven by differential resistor ladders, and a differential digital-to-analog converter (DAC) combined with the subtractor are described. The chip has been fabricated in a standard high-speed bipolar process and, by extensively utilizing compensation techniques, achieves +or-1 LSB integral nonlinearity and low harmonic distortion. A 75 Msample/s conversion rate not yet exceeded even by full-flash 10-b ADCs, has been achieved with a power consumption of 2 W. Due to the S/H circuit, the input bandwidth of 250 MHz; the effective resolution of 9 b at 5 MHz exhibits a gradual decrease over input frequency but still remains above 8 b up to 50 MHz. >

A 150-V subscriber line interface circuit (SLIC) in a new BiCMOS/DMOS-technology

The presented IC performs the high-voltage functions of an electronic central office subscriber line interface without the need for any transformers or relays. The challenges of subscriber line interface circuit (SLIC) integration stem from the combination of conflicting requirements: low impedance line feeding in a 150-V range, current sensing with 0.2% relative accuracy, and stability up to 200 nF loads, while operating in the harsh environment of the telephone line. The newly developed BiCMOS/DMOS process 170-V smart power technology (SPT 170) together with circuit techniques that strongly emphasize the physical device properties (e.g., buffers with DMOS outputs, n-type supply voltage switch, accuracy by polyresistors) yielded a very robust 30 mm/sup 2/ SLIC. All transmission specifications are met without trimming.

A 10 b 75 MHz subranging A/D converter

A two-step circuit in a fast bipolar technology that has higher sampling rate and analog bandwidth than previously reported monolithic 10-b analog-to-digital converters (ADCs) is discussed. A 75-MHz conversion rate with input bandwidth exceeding 100 MHz is achieved with 2-W power consumption.<<ETX>>

A 150 V subscriber line interface circuit (SLIC) in a new BiCMOS/DMOS-technology

The presented IC performs the high-voltage functions of an electronic subscriber line interface without the need for any transformers or relays. The challenges of SLIC integration stem from the combination of 150 V line feeding demands with 0.2% accuracy in a harsh environment. A new BCD-process, SPT170, together with appropriate circuit concepts (buffers with DMOS outputs, n-type supply voltage switch, accuracy by polysilicon resistors) yielded a 30 mm/sup 2/ robust SLIC with excellent transmission properties.

Integration of a subscriber line interface circuit (SLIC) in a new 170 V smart power technology

The presented IC performs the high-voltage functions of an electronic central office subscriber line interface without the need for any transformers or relays. The challenges of SLIC integration stem from the combination of requirements: 150 V supply, 0.2% accuracy and up to 200 nF loads, while operating in a harsh environment. A new BCD-process and circuitry that emphasizes the relative merits of the devices (e.g. buffers with DMOS outputs, n-type supply voltage switch, accuracy by polyresistors) yielded a 30 mm/sup 2/ rugged SLIC in the first design step. All transmission specifications are met without trimming.