René Krenz
Royal Institute of Technology
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by René Krenz.
asia and south pacific design automation conference | 2005
René Krenz; Elena Dubrova
The growing complexity of todays system designs requires fast and robust verification methods. Existing BDD, SAT or ATPG-based techniques do not provide sufficient solutions for many verification instances. Boolean function hashing is a probabilistic verification approach which can complement existing formal methods in a number of applications such as equivalence checking, biased random simulation, power analysis and power optimization. The proposed hashing technique is based on the arithmetic transform, which maps a Boolean function onto a probabilistic hash value for a given input assignment. The presented algorithm uses multiple-vertex dominators in circuit graphs to progressively simplify intermediate hashing steps. The experimental results on benchmark circuits demonstrate the robustness of our approach.
international symposium on multiple valued logic | 2003
René Krenz; Elena Dubrova; Andreas Kuehlmann
In this paper we present a fast algorithm for computing the value of a spectral transform of Boolean or multiple-valued functions for a given assignment of input variables. Our current implementation is for arithmetic transform, because our work is primarily aimed at optimizing the performance of probabilistic verification methods. However, the presented technique is equally applicable for other discrete transforms, e.g. Walsh or Reed-Muller transforms. Previous methods for computing spectral transforms used truth tables, sum-of-product expressions, or various derivatives of decision diagrams. They were fundamentally limited by the excessive memory requirements of these data structures. We present a new algorithm that partitions the computation of the spectral transform based on the dominator relations of the circuit graph representing the function to be transformed. As a result, the presented algorithm can handle larger functions than previously possible.
asia and south pacific design automation conference | 2005
René Krenz; Elena Dubrova
In this paper we present a fast algorithm for computing common multiple-vertex dominators in circuit graphs. Dominators are widely used in CAD applications such as satisfiability checking, equivalence checking, ATPG, technology mapping, decomposition of Boolean functions and power optimization. State of the art algorithms compute single-vertex dominators in linear time. However, the rare appearance of single-vertex dominators in circuit graphs requires the investigation of a broader type of dominators and the development of algorithms to compute them. We show that our new technique is faster and computes more common multiple-vertex dominators than existing techniques.
asia and south pacific design automation conference | 2004
Andrés Martinelli; René Krenz; Elena Dubrova
This paper presents an algorithm for disjoint- support decomposition of Boolean functions which combines functional and structural approaches. First, a set of proper cut points is identified in the circuit by using dominator relations (structural method). Then, the circuit is partitioned along these cut points and a BDD-based decomposition is applied to the resulting smaller functions (functional method). Previous work on Boolean decomposition used only single methods and did not integrate a combined strategy. The experimental results show that the presented technique is more robust than a pure BDD-based approach and produces better-quality decompositions.
international symposium on circuits and systems | 2005
René Krenz
We present an efficient technique for computing dominators in multiple-output circuit graphs. Dominators provide information about the origin and the end of reconverging paths in a graph. This information is widely used in CAD applications such as satisfiability checking, equivalence checking, ATPG, technology mapping, decomposition of Boolean functions and power optimization. Experiments on a large set of benchmarks show a significant performance improvement of our new technique in comparison to the well-known algorithm, presented by T. Lengauer and R.E. Tarjan (1979), for computing dominators in flowgraphs. We demonstrate that, in contrast to previous techniques, our algorithm obtains performance improvements especially for large benchmarks.
IWLS | 2002
René Krenz; Elena Dubrova; Andreas Kuehlmann
norchip | 2003
René Krenz; Elena Dubrova
11th IEEE/ACM International Workshop on Logic & Synthesis, June 4-7, 2002, New Orleans, Louisiana, USA | 2002
René Krenz; Elena Dubrova; Andreas Kuehlmann
IEE Proceedings - Circuits, Devices and Systems | 2006
René Krenz; Elena Dubrova
International Workshop on Logic Synthesis, Laguna Beach, CA, May 2003 | 2003
Andrés Martinelli; René Krenz; Elena Dubrova