Reza Sanati-Mehrizy

Parallel implementation of an extended functional programming language on cellular tree and data flow architectures

Extended Functional Programming language (EFP) la an extended version of FP [BJ78] which can simply manipulate the operations on Syntactically Represented Data Structures (SRDS) [SR87,TS86, TS87]. In EFP, a complex operation such as insertion of a node h a binary tree will be expressed in a set of parallel operations which are much simpler. Both Cellular Tree Architecture (CTA) [MG80] and Data Flow Architecture (DFA) [RM83] can be used to implement the operations on SRDS (in particular) in parallel. CTA, which has a full binary tree structure, containa an array of independent cells which are the leavea of the tree. Each cell will be involved with only one B*1 of the SRDS . Since these cells are independent, they can perform the operations on these symbols in parallel. So in CTA, we get parallelism within the operations as well as between the operations. In case of DFA, each complex operation will be converted to a sequence of primitive operations which may be performed in parallel. This sequence of operations will be represented by a basic block of instructions [RM83]. Each instruction represents a primitive operation. All the instructions with the number of dependencies equal to zero can be performed in parallel (if there are enough processors ). Only one processor is involved with the execution of each instruction. So there is no parallelism within the operation but only between the operations. In this paper these two computer architectures have been briefly described and the implementation of some operations on SRDS bas been demonstrated. Finally, these implementations on these two computer architectures have been compared and contracted by discussing some advantages and disadvantages of sach method. 1. Cellular Tree Architectmw Gyula Mag’o has designed the cellular tree architecture (CTA) which directly executes the Functional Programming language originated by Backus and which appears especially suitable for VLSI implementation. This section briefly describes this architecture. The following sections give some examples which show how the functions defined in EFP can be implemented on this architecture. Permission to copy without fee ell or pert of this meteriei is granted providad that the copies are not made or distributed for direct commercial advantage, the ACM copyri~ht notice and the title of the publication and its date appear, and notice is given that copyingis bypermissionof tha Association for Computing Mechinery. To copy otherwise, or to republish, requiresa fee and/or specific permission. e 1992ACM().89791-502.)(/92/0()02/0890.<.

Implementation of extended functional programming language on cellular tree and data flow architecture

1 .GJj For more information about this architecture, the interested reader can refer to [MG80, MG79a, 14G79b]. 1.1 Strnctnral Aspect of the Ambitectnre In this section a machine (CTA) will be described which is a binary tree of cells possibly with additional connections between leaves of the tree to form a linear array from the leavee as shown in the follcwing figure from[MG80] : This machine (Cellular Tree Machine] directly executes the Functional Programming language by distributing program symbols across the cells of the tree and it appears especially suitable for VLSI implemental ion because it is built of a large number of simple similar and small parts. Cells of one kind (L) form a linear array which normally hold the program text and cells of another kind (T) form a full hinary tree and they perform processing functions. The leaves of the tree are called L cells and collectively are called the L array. The non-leaf cells of the tree are called T cells. All the T cells are identical except for the root which serves aa the 1/0 port. All the L cells are identical. Since Tone has demonstrated [MG80] that the connections between L cells can be eliminated without losing tbe capability of the machine, those connection have been represented by broken lines. 1.2 cell Orgeniaetion Since both L and T cells execute simple operations they do not need to hold stacks, queues and the like. They only need to have a few dozen registers as local storage. So both L and T cells are rather small and consequently, as VLSI technology advances, the whole aubtrees of cells may be put on a single chip. The following figure from [MGSO] shows an attractive way of embedding a binary tree of cells in a plane within a single chip or acroas several chips. Such a machine is easily expandable to handle any long object.

Application of Wireless Sensor Networks in Health Care System

Extended functional programming language (EFP) is an extended version of FP[BJ78] which can simply manipulate the operations on syntactically represented data structures[SR87]. In EFP a complex operation such as insertion of node in a binary tree will be expressed in a set of parallel operations which are much simpler. Both CTA (cellular tree architecture) [MG80] and DFA (Data Flow Architecture) [RM83] can be used to implement the operations on data structures(in particular) in parallel. CTA which has a full binary tree structure contains an array of independent cells which are the leaves of the tree. Each cell will be involved with only one symbol of the syntactically represented data structure. Since these cells are independent, they can perform the operations on these symbols in parallel. So in CTA, we get parallelism within the operations as well as between the operations. For DFA, each complex operation will be converted to a sequence of primitive operations which may be performed in parallel. This sequence of operations will be represented by a basic block of instructions[RM83]. All the instructions with the number of dependencies equal to zero can be performed in parallel(if there are enough processors). Each instruction represents a primitive operation. Only one processor is involved with the execution of each instruction. So there is no parallelism within the operation but only between the operations. In [SR87] these two computer architectures have been briefly described and by giving some examples, it has been shown how a specific function can be implemented on these computer architectures. At the end, these two computer architectures have been compared and contrasted by discussing some advantages and disadvantages of each method.