Richard A. Bredthauer

New advancements in charge-coupled device technology: subelectron noise and 4096 x 4096 pixel CCDs

This paper reports on two new advancements in CCD technology. The first area of development has produced a special purpose CCD designed for ultra low-signal level imaging and spectroscopy applications that require sub-electron read noise floors. A nondestructive output circuit operating near its 1/f noise regime is clocked in a special manner to read a single pixel multiple times. Off-chip electronics average the multiple values, reducing the random noise by the square-root of the number of samples taken. Noise floors below 0.5 electrons rms are reported. The second development involves the design and performance of a high resolution imager of 4096 x 4096 pixels, the largest CCD manufactured in terms of pixel count. The device utilizes a 7.5-micron pixel fabricated with three-level poly-silicon to achieve high yield.

Fano-Noise-Limited CCDs

Recent developments of scientific CCDs have produced sensors that achieve ultra low read noise performance (less than 2 electrons rms) and near perfect charge transfer efficiency (0.9999996) without the addition of a fat-zero. This progress has now made it possible to achieve Fano-noise-limited performance in the soft x-ray where the detectors energy resolution is primarily limited by the statistical variation in the charge generated by the interacting x-ray photon. In this paper, Fano-noise-limited test data is presented for two different CCD types and a CCD derived estimate of the Fano factor is determined. By evaluating ultra low-modulation images (less than 1 electron peak-to-peak) it is shown that the CCDs global CTE is now superior to its read noise floor. To capitalize on this capability CCD manufacturers are now focusing their attention on reducing the noise floor below the 1 electron level thereby matching the sensors CTE performance. This improvement, if accomplished, will push Fano-noise-limited performance for the CCD into the extreme ultra-violet.

Notch and large-area CCD imagers

A technique for improving the performance oflarge area high resolution Charge-Coupled Device (CCD) imagers will be described. Adding an additional doped channel down the center of a CCD register provides for charge confinement. This leads to improved charge transfer efficiency and resistance to radiation damage. Two dimenslonal theoretical analysis will be shown along with measured device performance.

Sub-electron noise charge-coupled devices

A charge coupled device designed for celestial spectroscopy has achieved readout noise as low as 0.6 electrons rms. A nondestructive output circuit was operated in a special manner to read a single pixel multiple times. Off-chip electronics averaged the multiple values, reducing the random noise by the square root of the number of readouts. Charge capacity was measured to be 500,000 electrons. The device format is 1600 pixels horizontal by 64 pixels vertical. Pixel size is 28 microns square. Two output circuits are located at opposite ends of the 1600 bit CCD register. The device was thinned and operated backside illuminated at -110 degrees C. Output circuit design, layout, and operation are described. Presented data includes the photon transfer curve, noise histograms, and bar-target images down to 3 electrons signal. The test electronics are described, and future improvements are discussed.

Recent Developments In Large Area Scientific CCD Image Sensors

The design and performance of a 1024x1024 pixel charge-coupled device (CCD) imager are described. This device is fabricated utilizing a 3-phase, three-level polysilicon gate process. The chip is thinned and is employed in the back-illumination mode. Detailed measurements including imagery, read noise, full well capacity, charge transfer efficiency, linearity, dark current, spectral response, residual image, and charge collection efficiency are reported.

Very Large Area 2048 And 4096 CCD Image Sensors

The design and performance of two very high resolution CCD imagers will be described. Both devices utilize a 7.5 micron pixel and are fabricated with three-level polysilicon to achieve high yield. Dynamic range, charge transfer efficiency, spectral response and successful imagery are demonstrated.

Development of a 2048 X 2048 imager for scientific applications

A large-format CCD imager is described and tested. The CCD imager incorporates floating diffusion as well as floating gate amplifiers on a 2048 by 2048 format which was employed as the design base. The amplifiers are intended to allow repeated nondestructive read operations on individual pixels in the array. The serial register was separated into two independently clocked halves to permit simultaneous readout of all four quadrants of the imager. Extensive schematic layouts of the base model and modification are given. The results of a performance test are presented, showing good results in the cooling curve for average dark current, and for charge transfer characteristics. The amplifiers are intended to reduce net readout noise, and the simultaneous readout capability is intended to reduce total read time, although neither was fully tested. The large-format CCD imager is of interest for astronomical photography and spectroscopic applications.

Development Of Large CCD Arrays With Enhanced UV Performance

In support of programs in surveillance, star tracking and the use of intensified sensors, a series of CCD activities were begun in 1984 by Science Applications International Corporation. They now include the 1989 company-funded development of 1024 x 1024, 18 micron pixel CCDs, benefiting from technology transfer from JPL, and fabricated for SAIC by Ford Aerospace. The result has been a most successful series of CCDs and continued SAIC investment in 1) augmentations of the original Multi-Pinned Phase (MPP) version, 2) the first wafer configuration and funding commitment for Open-Pinned-Phase (OPP) (invented by J. Janesick), and now the configuration of a variety of larger and smaller versions of 18 micron pixel MPP CCDs, to be operated with either front- or back-illumination. This paper surveys activities which are now leading toward reduced noise and toward improved visible region QE and toward the acquisition of UV/Xray responsivity coupled with the features of the MPP CCDs.

64 Output 1024X1024 Pixel Imager For High Frame Rate Applications

A 1024x1024 imager suitable for high frame rate applications is described. Sixty-four parallel outputs are incorporated to achieve high resolution fast framing with reduced individual port data rate. Layout segmentation and a separate masking step provides for operation as either a frame store or full frame imager. This paper discusses the architecture, fabrication and packaging of the imager.