Richard M. Bradford

ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs

In hard real-time systems such as avionics, computerboard level designs are typically customized to meet specific reliability and real time requirements. This paper focuses on computer-aided application-specific design of I/O architecture using PCI as an example. We have built a tool (ASIIST) that will enable engineers to explore design spaces at the I/O bus architecture level, performing analysis that incorporates bus protocols, to provide guarantees of real-time properties.

Integrated Modular Avionics (IMA) Partition Scheduling with Conflict-Free I/O for Multicore Avionics Systems

The trend in the semiconductor industry toward multicore processors poses a significant challenge to many suppliers of safety-critical real-time embedded software. Having certified their systems for use on single-core processors, these companies may be forced to migrate their installed base of software onto multicore processors as single-core processors become harder to obtain. These companies naturally want to minimize the potentially high costs of recertifying their software for multicore processors. In support of this goal, we propose an approach to solving a fundamental problem in migrating legacy software applications to multicore systems, namely that of preventing conflicts among I/O transactions from applications residing on different cores. We formalize the problem as a partition scheduling problem that serializes I/O partitions. Although this problem is strongly NP-complete, we formulate it as a Constraint Programming (CP) problem. Since the CP approach scales poorly, we propose a heuristic algorithm that outperforms the CP approach in scalability.

Optimized scheduling of multi-IMA partitions with exclusive region for synchronized real-time multi-core systems

Integrated Modular Avionics (IMA) architecture has been widely adopted by the avionics industry due to its strong temporal and spatial isolation capability for safety-critical real-time systems. The fundamental challenge to integrating an existing set of single-core IMA partitions into a multi-core system is to ensure that the isolation of the partitions will be maintained without incurring huge redevelopment and recertification costs. To address this challenge, we developed an optimized partition scheduling algorithm which considers exclusive regions to achieve the synchronization between partitions across cores. We show that the problem of finding the optimal partition schedule is NP-complete and present a Constraint Programming formulation. In addition, we relax this problem to find the minimum number of cores needed to schedule a given set of partitions and propose an approximation algorithm which is guaranteed to find a feasible schedule of partitions if there exists a feasible schedule of exclusive regions.

Holistic design parameter optimization of multiple periodic resources in hierarchical scheduling

Hierarchical scheduling of periodic resources has been increasingly applied to a wide variety of real-time systems due to its ability to accommodate various applications on a single system through strong temporal isolation. This leads to the question of how one can optimize over the resource parameters while satisfying the timing requirements of real-time applications. A great deal of research has been devoted to deriving the analytic model for the bounds on the design parameter of a single resource as well as its optimization. The optimization for multiple periodic resources, however, requires a holistic approach due to the conflicting requirements of the limited computational capacity of a system among resources. Thus, this paper addresses a holistic optimization of multiple periodic resources with regard to minimum system utilization. We extend the existing analysis of a single resource in order for the variable interferences among resources to be captured in the resource bound, and then solve the problem with Geometric Programming (GP). The experimental results show that the proposed method can find a solution very close to the one optimized via an exhaustive search and that it can explore more solutions than a known heuristic method.

Exploring the design space of IMA system architectures

In systems such as integrated modular avionics (IMA), there is a substantial benefit from maintaining significant portions of a product familys architecture unchanged from one system to the next. When there are tight constraints on resources such as bandwidth and processor capacity, however, certain seemingly small changes in a few components have the potential to create a cascade of timing problems. The ability to rapidly analyze and quantify the impact of these changes prior to implementation and system integration provides the engineering team with early validation of the changes, which can prevent substantially increased costs for design, integration, and verification, as well as delays in the development schedule. However, detailed early evaluation of architecture performance involves analysis of many complex interrelated variables and is therefore challenging. Consider the case of moving a task from a processors IMA partition to another processors partition. The tasks sets need to be updated. The I/O and network traffic must be rerouted. The schedulability equations of processor, I/O and network need to be recreated, and the analysis needs to be propagated end to end. Last but not least, all the architecture specification documents have to be updated. In order to reduce the detailed architecture evaluation effort, we have automated the performance analysis process with a system integration tool prototype called ASIIST (Application-Specific I/O Integration Support Tool). To move a task, we can now use a graphical interface to drag and drop a task from one processors IMA partition to another. All the steps described above are done automatically, including the updating of the architecture specification in AADL (Architecture Analysis and Description Language). In this paper, we show how to use this tool to explore the design space of an IMA system architecture, so as to derive designs with specified performance properties.

Rapid Early-Phase Virtual Integration

In complex hard real-time systems with tight constraints on system resources, small changes in one component of a system can cause a cascade of adverse effects on other parts of the system. We address the inherent complexity of making architectural decisions by raising the level of abstraction at which the analysis is performed. Our analysis approach gives the system architect a rigorous method for quickly determining which system architectures should be pursued, and it allows the architect to track and manage the cascading effects of subsystem/component changes in a comprehensive, quantitative manner. The end product is a virtual architecture analysis that systematically incorporates the inherent coupling among interacting system components that share limited system resources.

Real-Time Computing on Multicore Processors

Architects of multicore chips for avionics must define and bound intercore interference, which requires assuming a constant worst-case execution time for tasks executing on the chip. With the Single Core Equivalent technology package, engineers can treat each core as if it were a single-core chip.

A schedulability test for software migration on multicore system

This paper presents a new schedulability test for safety-critical software undergoing a transition from single-core to multicore systems — a challenge faced by multiple industries today. Our migration model consists of a schedulability test and execution model. Its properties enable us to obtain a utilization bound that places an allowable limit on total task execution times. Evaluation results demonstrate the advantages of our scheduling model over competing resource partitioning approaches, such as Periodic Server and TDMA.

Reliable service discovery for network-centric systems

This paper describes a service-oriented architecture for network-centric operations that supports Reliable Service Discovery (RSD). We analyze several complementary mechanisms for improving the reliability of the service discovery process. These include distributed service registries with replication of registry entries, periodic revalidation of registry data with propagation of registry updates, and adaptive reconfiguration of the registry topology in response to changes in network membership and connectivity. We derive properties for each of these mechanisms that lead to optimal performance in the resourceconstrained environments typical of mobile ad hoc networks (MANETs). We then outline directions for further research, including a concept of adaptive intelligent registry proxies that can opportunistically employ peer-to-peer caching and sharing of registry information when it is appropriate from both the system perspective and the individual client perspective.