Richard W. Adkisson

System and method for compensating for skew between a first clock signal and a second clock signal

Coherent ordering queue for computer system

Phase detector for a programmable clock synchronizer

Duration minimum and maximum circuit for performance counter

Increment/decrement circuit for performance counter

System and method for determining transaction time-out

General purpose performance counter

Start/stop circuit for performance counter

Controller for clock synchronizer

Systems and methods controlling transaction draining for error recovery