Rm Rui Santos

An introduction to InP-based generic integration technology

Photonic integrated circuits (PICs) are considered as the way to make photonic systems or subsystems cheap and ubiquitous. PICs still are several orders of magnitude more expensive than their microelectronic counterparts, which has restricted their application to a few niche markets. Recently, a novel approach in photonic integration is emerging which will reduce the R&D and prototyping costs and the throughput time of PICs by more than an order of magnitude. It will bring the application of PICs that integrate complex and advanced photonic functionality on a single chip within reach for a large number of small and larger companies and initiate a breakthrough in the application of Photonic ICs. The paper explains the concept of generic photonic integration technology using the technology developed by the COBRA research institute of TU Eindhoven as an example, and it describes the current status and prospects of generic InP-based integration technology.

Stability of a monolithic integrated filtered-feedback laser.

We experimentally and theoretically investigate the stability of a single-mode integrated filtered-feedback laser as a function of the electrically controlled feedback phase. We interpret the measurements in terms of feedback-induced dynamics, compare them with the results from a stability analysis model for conventional feedback, and find good qualitative agreement.

A dense spot size converter array fabricated in a generic process on InP

Integrated spot size converters (SSCs) are key components for efficient coupling between Photonic Integrated Circuits (PICs) and fibre-arrays. We report a compact SSC which is suitable for integration into dense arrays with a pitch down to 25 μm and compatible with our generic InP-based platform technology, which supports integration of SOAs and Electro Optical Modulators with a range of passive components. The small pitch supports coupling tens of on-chip optical waveguide ports to fiber arrays via a low-loss dielectric interposer chip. The density allows the design of a customized optical bus between the InP PIC and the interposer chip. The dielectric chip may simply expand to the pitch of a fiber array but also contain low-loss passive circuitry like delay-lines, high Q-filters and multiplexers. The latter enables the formation of a hybrid integration platform with our InP-based technology. Efficient coupling is obtained by adiabatically transforming the sub-micron modes of the InP waveguides to the 3 μm diameter mode of the interposer. We tested our SSCs by coupling to a lensed fibre with a mode field diameter of 2.5 μm. Coupling losses were found to be as low as 0.6 dB per fiber chip coupling for device lengths of a few 100 μm. We also measured the crosstalk from one input port to output ports adjacent to the targeted output port. We present simple design rules for reducing the crosstalk to neighbouring output ports below -50 dB. The quality and uniformity of the SSCs is demonstrated by fabrication of an 8 x 8 AWG demultiplexer between two SSC arrays placed at input and output ports. We measured an insertion loss between fibres of 4 dB for the central channel of the AWG, which is record low for an InP-based device.

Vertical coupling mirror for on-wafer optical probing of photonic integrated circuits

On-wafer probing of optical signals offers powerful means for assessing the fabrication process quality of photonic integrated circuits. We describe the fabrication and characterization of a vertical optical coupler that enables on-wafer probing.

Feedback Phase Influence on an Integrated Filtered-Feedback Laser

The stability of a novel monolithically integrated filtered-feedback laser is experimentally investigated as a function of the electrically controlled feedback phase. By backing them up with the results from a stability analysis model, we interpret the measurements in terms of feedback-induced dynamics. We show that this laser has excellent potential for narrow linewidth.

InP-Based Generic Foundry Platform for Photonic Integrated Circuits

The standardization of photonic integration processes for InP has led to versatile and easily accessible generic integration platforms. The generic integration platforms enable the realization of a broad range of applications and lead to a dramatic cost reduction in the development costs of photonic integrated circuits (PICs). This paper addresses the SMART Photonics generic integration platform developments. The integration technology based on butt joint active-passive epitaxy is shown to achieve a platform without compromising the performance of the different components. The individual components or building blocks are described. A process design kit is established with a comprehensive dataset of simulation and layout information for the building blocks. Latest results on process development and optimization are demonstrated. A big step forward is achieved by applying high-resolution ArF lithography, which leads to increased performance for AWGs and a large increase in reproducibility and yield. The generic nature of the platform is demonstrated by analyzing a number of commercial multiproject wafer runs. It is clear that a large variety of applications is addressed with more than 200 designs from industry as well as academia. A number of examples of PICs are displayed to support this. Finally, the design flow is explained, with focus on layout-aware schematic-driven design flow that is required for complex circuits. It can be concluded that generic integration on InP is maturing fast and with the current developments and infrastructure it is the technology of choice for low cost, densely integrated PICs, ready for high-volume manufacturing.

Photonic hybrid assembly through flexible waveguides

Fully automated, high precision, cost-effective assembly technology for photonic packages remains one of the main challenges in photonic component manufacturing. Next to the cost aspect the most demanding assembly task for multiport photonic integrated circuits (PICs) is the high-precision (±0.1 μm) alignment and fixing required for optical I/O in InP PICs, even with waveguide spot size conversion. In a European research initiative – PHASTFlex - we develop and investigate an innovative, novel assembly concept, in which the waveguides in a matching TriPleX interposer PIC are released during fabrication to make them movable. After assembly of both chips by flip-chip bonding on a common carrier, TriPleX based actuators and clamping functions position and fix the flexible waveguides with the required accuracy.