Robert Birkner

Aerial image measuring system at 193 nm: a tool-to-tool comparison and global CD mapping

Reticle inspection and qualification is getting very important due to the overall shrinking feature sizes on chips and CD values less than the exposure wavelength. Mask defects will matter increasingly and successful defect disposition and image qualification is becoming essential to improve yield. Currently ongoing studies demonstrate the beneficial use of AIMSTM* (Aerial Image Measuring System) -besides its application in mask shops like repair verification- for various wafer fab applications like Incoming Qualitiy Check (IQC), Automated Reticle Defect Disposition (ARDD)1, OPC verification or litho process evaluation in engineering without the use of stepper time and image qualification through wafer SEM evaluation. Among the important questions for the use of an aerial image measuring system is the level on which different tools compare to each other in terms of critical system performance parameters in order to judge the results of the data analysis in a global way. In this work we conducted a tool to tool comparison study of AIMSTM fab 193 systems investigating parameters like: Normalized illumination uniformity, CD (critical dimension) uniformity over field, and static CD repeatability over time in x- and y-directions. The study is based on the evaluation of a data base collected with typical feature sizes of 1μm on the mask, ensuring with such feature sizes that tool results are independent of mask features being close to the resolution limit or the printability capability. Typical settings are NA = 0.7 and circular sigma = 0.6 on a set of tools in the field as well as in-house. In addition the performance of the tools will be discussed in terms of a specific application, global CD mapping, for use in process control. It can be applied for different use in wafer fab and mask shop environment.

The Flash Memory battle : How low can we go?

With the introduction of the TWINSCAN XT:1900Gi the limit of the water based hyper-NA immersion lithography has been reached in terms of resolution. With a numerical aperture of 1.35 a single expose resolution of 36.5nm half pitch has been demonstrated. However the practical resolution limit in production will be closer to 40nm half pitch, without having to go to double patterning alike strategies. In the relentless Flash memory market the performance of the exposure tool is stretched to the limit for a competitive advantage and cost-effective product. In this paper we will present the results of an experimental study of the resolution limit of the NAND-Flash Memory Gate layer for a production-worthy process on the TWINSCAN XT:1900Gi. The entire gate layer will be qualified in terms of full wafer CD uniformity, aberration sensitivities for the different wordlines and feature-center placement errors for 38, 39, 40 and 43nm half pitch design rule. In this study we will also compare the performance of a binary intensity mask to a 6% attenuated phase shift mask and look at strategies to maximize Depth of Focus, and to desensitize the gate layer for lens aberrations and placement errors. The mask is one of the dominant contributors to the CD uniformity budget of the flash gate layer. Therefore the wafer measurements are compared to aerial image measurements of the mask using AIMSTM 45-193i to separate the mask contribution from the scanner contribution to the final imaging performance.

Impact of alternative mask stacks on the imaging performance at NA 1.20 and above

The lithographic performance of current state-of-the-art resolution enhancement techniques (RET) will become critical at hyper numerical aperture (NA>1) due to mask 3D effects. We have studied the impact of the mask material on the lithographic performance at NA 1.2 and above. The assessment, both by rigorous simulations and experiments, involves the standard mask stacks, Cr binary mask (BIM) and MoSi 6% attenuated phase shift mask (attPSM), as well as alternatives such as thick Cr BIM, Ta/SiO2 1% and 6% attenuated PSM, and Ta/SiON 1% attenuated PSM. Using the rigorous electro-magnetic field (EMF) and lithographic process simulations (IISB DrLiTHO) the mask structure is optimized taking into account the trade_off with mask error enhancement factor (MEEF). Next, a throughpitch evaluation of the 45nm half-pitch (HP) node at NA1.2-1.35 is carried out examining maximum exposure latitude (EL), depth-of-focus (DOF), best focus shifts, and MEEF behavior for the various mask stacks. For the validation of the simulation methodology a correlation is made between scanner (ASML XT:1700Fi), AIMS (Zeiss AIMSTM45-193i), and simulation results indicating the importance of the mask quality and mask properties. Based on the lithographic performance and the mask manufacturability we put together a ranking of the commercially available mask stacks for the 45nm HP node at NA 1.2 and 1.35.

Mask CD control (CDC) with ultrafast laser for improving mask CDU using AIMS as the CD metrology data source

CD uniformity control by ultrafast laser system writing inside the bulk of photomasks has previously been shown to be an effective method for local CD Control (CDC) [1], Intra-field CD variations correction has been implemented effectively in mask-shops and fabs based on CDC SEM [2, 3] and OCD as the CD data source. Using wafer CD data allows correction of all wafer field CD contributors at once, but does not allow correcting for mask CD signature alone. In case of a mask shop attempting to improve CDU of the mask regardless of a particular exposure tool, it is a better practice to use mask CD data by itself as the CD data source. We propose using an aerial imaging system AIMS 45-193i as the mask CD data source for the CDC process. In this study we created a programmed CD mask (65nm dense L/S) with relatively large CD errors. The programmed CD mask was then measured by AIMS 45-193i (AIMS45) which defined the CDU map of the programmed CD mask. The CDU data from AIMS 45-193i was then used by Pixer CDC101 to correct the CDU and bring it back to a flat almost ideal CDU. Results 1. AIMS 45-193i managed to map the full mask CDU with a resolution of 0.5 nm. 2. The CDC101 managed to correct the CDU based on the AIMS 45-193i data from Range 5nm and 3S 4nm down to Range 45-193i and CDC101 alone, without any wafer CD data, the mask CDU can be improved >70% and mask contribution to wafer CDU can be brought down to <1.0 nm 3S.

Process Window improvement on 45 nm technology Non Volatile Memory by CD uniformity improvement

For the next years optical lithography stays at 193nm with a numerical aperture of 1.35. Mask design becomes more complex, mask and lithography specification tighten and process control becomes more important than ever. Accurate process control is a key factor to success to maintain a high yield in chip production. One of the key parameters necessary to assure a good and reliable functionality of any integrated circuit is the Critical Dimension Uniformity (CDU). There are different contributors which impact the total wafer CDU: mask CD uniformity, scanner repeatability, resist process, lens fingerprint, wafer topography etc. In this work we focus on improvement of intra-field CDU at wafer level by improving the mask CD signature using a CDC200TM tool from Carl Zeiss SMS. The mask layout used is a line and space dark level of a 45nm node Non Volatile Memory (NVM). A prerequisite to improve intra-field CDU at wafer level is to characterize the mask CD signature precisely. For CD measurement on mask the newly developed wafer level CD metrology tool WLCD32 of Carl Zeiss SMS was used. The WLCD32 measures CD based on proven aerial imaging technology. The WLCD32 measurement data show an excellent correlation to wafer CD data. For CDU correction the CDC200TM tool is used which utilizes an ultrafast femto-second laser to write intra-volume shading elements (Shade-In ElementsTM) inside the bulk material of the mask. By adjusting the density of the shading elements, the light transmission through the mask is locally changed in a manner that improves wafer CDU when the corrected mask is printed. In the present work we will demonstrate a closed loop process of WLCD32 and CDC200TM to improve mask CD signature as one of the main contributors to intra-field wafer CDU. Furthermore we will show that the process window will be significantly enlarged by improvement of intra-field CDU. An increase of 20% in exposure latitude was observed.

CD Uniformity correction on 45 nm technology Non Volatile Memory

One of the key parameters necessary to assure a good and reliable functionality of any integrated circuit is the Critical Dimension Uniformity (CDU). There are different contributors which impact the total CDU: mask CD uniformity, scanner and lens fingerprint, resist process, wafer topography, mask error enhancement factor (MEEF) etc. In this work we focus on improvement of intra-field CDU at wafer level by improving the mask CD signature using a CDC200TM tool from Carl Zeiss SMS. The mask layout used is a line and space dark level of a 45nm node Non Volatile Memory (NVM). A prerequisite to improve intra-field CDU at wafer level is to characterize the mask CD signature precisely. For CD measurement on mask the newly developed wafer level CD metrology tool WLCD32 of Carl Zeiss SMS was used. The WLCD32 measures CD based on aerial imaging technology. The WLCD32 measurement data show an excellent correlation to wafer CD data. For CDU correction the CDC200TM tool is used. By utilizing an ultrafast femto-second laser the CDC200TM writes intra-volume shading elements (Shade-In ElementsTM) inside the bulk of the mask. By adjusting the density of the shading elements, the light transmission through the mask is locally changed in a manner that improves wafer CDU when the corrected mask is printed. In the present work we will demonstrate a closed loop process of WLCD32 and CDC200TM to improve mask CD signature as one of the main contributors to intra-field wafer CDU.

The imaging performance of Flash Memory masks characterized with AIMS

Flash memory is an important driver of the lithography roadmap, with its dramatic acceleration in dimensional shrink, pushing for ever smaller feature sizes. The introduction of hyper-NA immersion lithography has brought the 45nm node and below within reach for memory makers using single exposure. At these feature sizes mask topology and the material properties of the film stack on the mask play an important role on imaging performance. Furthermore, the break up of the array pitch regularity in the NAND-type flash memory cell by two thick wordlines and a central space, leads to feature-center placement (overlay) errors, that are inherent to the design. An integral optimization approach is needed to mitigate these effects and to control both the CD and placement errors tightly. In this paper we will show that aerial image measurements at mask-level are useful for characterizing the gate layer of a NAND-Flash design before exposure. The aerial image measurements are performed with the AIMSTM 45-193i. and compared to CD measurements on the wafer obtained with an XT:1900Gi hyper-NA immersion system. An excellent correlation is demonstrated for feature-center placement errors and CD variations across the mask (see Figure 1) for several features in the gate layer down to 40nm half pitch. This shows the potential to use aerial image measurements at mask-level in combination with correction techniques on the photomask, like the CDC200 tool in combination with exposure tool correction techniques, such as DoseMapperTM, to improve both across field and across wafer CD uniformity of critical layers.

Mask tuning for process window improvement

For the next years optical lithography stays at 193nm with a numerical aperture of 1.35. Mask design becomes more complex, mask and lithography specifications tighten. The k1 factor comes close to 0.25 which leads to a tremendously increased Mask Error Enhancement Factor (MEEF). This means that CD errors on mask are getting highly amplified on wafer. Process control becomes more important than ever. Accurate process control is a key factor to success to maintain a high yield in chip production. One key parameter to ensure a high and reliable functionality for any integrated circuit is the critical dimension uniformity (CDU). There are different contributors which impact the intra-field CD performance at wafer such as mask CD uniformity, scanner fingerprint, resist process etc. In the present work we focus on improvement of mask CD signature which is one of the main contributors to intra-field CD uniformity. The mask CD uniformity has been measured by WLCD32 which measures the CD based on proven aerial image technology. Based on this CD input the CD uniformity was corrected by CDC200TM and afterwards verified by WLCD32 measurement. The CDC200TM tool utilizes an ultrafast femto-second laser to write intra-volume shading elements (Shade-In ElementsTM) inside the bulk material of the mask. By adjusting the density of the shading elements, the light transmission through the mask is locally changed in a manner that improves wafer CDU when the corrected mask is printed. Additionally, the impact of the improved CD uniformity on the lithography process window was investigated. Goal of the work is to establish a process flow for mask CD uniformity improvement based on mask CD metrology by WLCD32 and mask CD uniformity control by CDC200TM and to verify its impact on the lithography process window. The proposed process flow will be validated by wafer prints. It was shown that the WLCD32 has an excellent correlation to wafer data and an outstanding CD repeatability. It provides a reliable input for CD uniformity correction and is the tool of choice to verify the CD uniformity improvement after CDC200TM treatment.

Reducing the impact of reticle CD-non-uniformity of multiple structures by dose corrections based on aerial image measurements

For many critical lithography applications the main contributor to wafer intra-field CD variation is the reticle CD variation. Current practice is that the input data needed to correct the effect of the reticle on the wafer CD is gathered using wafer exposures and SEM or scatterometry analysis. This approach consumes valuable scanner time and adds wafer costs. In this work we evaluate the potential for Intra-Field CD non-uniformity (CDU) correction based on aerial image reticle measurements for a complex 2D structure, including peripheral structures. The application selected is a 45nm rotated brick wall structure (active area DRAM). A total of 10 line / space structures (both horizontal and vertical) through pitch represent the periphery. Mask qualification has been performed using the newly developed Zeiss WLCD32 metrology tool, which measures wafer level CD on masks using aerial imaging technology. Excellent correlation is shown between intra-field wafer data and WLCD32 data. Furthermore, a comparison is made between the correction potential of ASML DoseMapper recipes based on wafer data and on WLCD32 mask data, indicating that the potential CDU improvement via both approaches is similar. Exposures with the resulting dose recipes have been used to confirm this predicted correction potential in a realistic setting.

Mask CD Uniformity Metrology for Logic Patterning and its Correlation to Wafer Data

With the next technology nodes 193nm lithography is pushed to its utmost limits. The industry is forced to print at low k1 factor which goes along with a high MEEF. Additionally, new blank materials are being introduced for smaller nodes. From 4x node and beyond, global CD uniformity on wafer is getting more critical and becomes key factor to ensure a high yield in chip production. Advanced process control is required and correction strategies are applied to maintain tight wafer CD uniformity. Beside other parameters, like scanner and etch process, mask CD uniformity is one main contributor to the intra-field CD on wafer. To enable effective CDU correction strategies it is necessary to establish a mask CD uniformity metrology which shows a good correlation to wafer prints. Especially for logic pattern mask uniformity measurements to control intra-field CD uniformity becomes challenging. In this paper we will focus on mask CD uniformity measurement for logic application utilizing WLCD, which is based on aerial image technology. We will investigate 40nm node and 28nm node gate masks using 6% MoSi phase shifting mask and MoSi binary mask respectively. Furthermore, we will correlate the mask CD uniformity data to wafer data to evaluate the capability of WLCD to predict the intra-field wafer CD uniformity correctly in order to support feedforward correction strategies. We will show that WLCD shows an excellent correlation to wafer data. Additionally, we will provide an outlook on logic contact-hole masks showing first CD uniformity data and wafer correlation data.