Robert F. Lucas

DARPA's HPCS Program- History, Models, Tools, Languages

Abstract The historical context with regard to the origin of the DARPA High Productivity Computing Systems (HPCS) program is important for understanding why federal government agencies launched this new, long-term high-performance computing program and renewed their commitment to leadership computing in support of national security, large science and space requirements at the start of the 21st century. In this chapter, we provide an overview of the context for this work as well as various procedures being undertaken for evaluating the effectiveness of this activity including such topics as modelling the proposed performance of the new machines, evaluating the proposed architectures, understanding the languages used to program these machines as well as understanding programmer productivity issues in order to better prepare for the introduction of these machines in the 2011–2015 timeframe.

Building the Teraflops/Petabytes Production Supercomputing Center

Building the Teraflops/Petabytes Production Supercomputing Center Horst D. Simon, William T. C. Kramer, and Robert F. Lucas National Energy Research Scientific Computing Center (NERSC), Mail Stop 50B-4230, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 {hdsimon, wtkramer, rflucas}@lbl.gov Abstract. In just one decade, the 1990s, supercomputer centers have undergone two fundamental transitions which require rethinking their operation and their role in high performance computing. The first transition in the early to mid-1990s resulted from a technology change in high performance computing architecture. Highly parallel distributed memory machines built from commodity parts increased the operational complexity of the supercomputer center, and required the introduction of intellectual services as equally important components of the center. The second transition is happening in the late 1990s as centers are introducing loosely coupled clusters of SMPs as their premier high performance computing platforms, while dealing with an ever-increasing volume of data. In addition, increasing network bandwidth enables new modes of use of a supercomputer center, in particular, computational grid applications. In this paper we describe what steps NERSC is taking to address these issues and stay at the leading edge of supercomputing centers. Introduction In just one decade, the 1990s, supercomputer centers have undergone two fundamental transitions which require a rethinking of the basic tenets of their operation and their role in the high performance computing (HPC) world. The first transition in the early to mid 1990s was a result of a technology change in high performance computing architecture. The introduction of highly parallel distributed memory machines built from commodity parts increased the operational complexity of the supercomputer center, and required the introduction of intellectual services as equally important components of the center. We have only recently completed this transition and developed the tools necessary to bring the revolution of the mid-1990s to a successful conclusion. Now three new developments are appearing which will again force us to step up to new challenges in supercomputer center management: (1) yet another change in the architecture of supercomputing platforms, (2) the increasing importance of managing large volumes of scientific data, and (3) the deployment of a new generation of high-speed wide-area

Future directions in scientific supercomputing for computational physics

NERSC, the National Energy Research Scientific Computing Center, is a leading scientific computing facility for unclassified research, and has had a significant impact on computational physics in the U.S. Here we will summarize the recent experience at NERSC, and present the four key elements of our strategic plan for the next five years. Significant changes are expected to happen in computational science during this period. Supercomputer centers worldwide must continue to enhance their successful role as centers that bridge the gap between advanced development in computer science and mathematics on one hand, and scientific research in the physical, chemical, biological, and earth sciences on the other. Implementing such a strategy will position NERSC and other centers in the U.S. to continue to enhance the scientific productivity of the computational physics community, and to be an indispensable tool for scientific discovery.

Pragma-Controlled Source-to-Source Code Transformations for Robust Application Execution

The most widely used resiliency approach today, based on Checkpoint and Restart (C/R) recovery, is not expected to remain viable in the presence of the accelerated fault and error rates in future Exascale-class systems. In this paper, we introduce a series of pragma directives and the corresponding source-to-source transformations that are designed to convey to a compiler, and ultimately a fault-aware run-time system, key information about the tolerance to memory errors in selected sections of an application. These directives, implemented in the ROSE compiler infrastructure, convey information about storage mapping and error tolerance but also amelioration and recovery using externally provided functions and multi-threading. We present preliminary results of the use of a subset of these directives for a simple implementation of the conjugate-gradient numerical solver in the presence of uncorrected memory errors, showing that it is possible to implement simple recovery strategies with very low programmer effort and execution time overhead.

Multifrontal computations on accelerators

Solving the system of linear equations Ax=b, where A is both large and sparse, is a computational bottleneck in many scientific and engineering applications. This has led to over half-a-century of research into new algorithms and new computing systems to accelerate the solution of these linear systems. The recent availability of accelerators such a Graphical Processing Units (GPU) and the Intel Phi™ promises high performance and thus savings in time, cost and energy. This paper presents the methodology and results achieved applying two accelerators, the Nvidia Tesla K40M™ and the Intel Xeon Phi, to this problem.