Robert H. Caverly

The frequency-dependent impedance of p-i-n diodes

It is demonstrated that the impedance of a forward-biased p-i-n diode is definable as a function of frequency and depends on the diodes geometry and electronic properties. A procedure for calculating the equivalent series p-i-n diode impedance is presented and compared with experimental resistance versus frequency data for silicon p-i-n diodes. A procedure is also outlined for determining diode parameters for a desired resistance-frequency response. >

Distortion in broad-band gallium arsenide MESFET control and switch circuits

The author analyzes the nonlinear mechanisms of the MESFET in its passive control mode of operation and equations are developed that allow designers to predict second- and third-order harmonic and intermodulation products in the conducting state MESFET. The analytic expressions are verified by experimental data. The discussion is based on a lumped element equivalent circuit model and is limited to applications where the MESFET is operating in its conducting state. In switch circuits, the analysis indicates that distortion may be reduced by the use of MESFETs with pinchoff voltages in the 2-3-V range and with large open channel current capacities. In attenuators, the analysis shows extreme variations in the level of distortion over a relatively narrow range of attenuation levels. Distortion in the case of the reflective attenuator may be reduced by the use of MESFETs with small open channel current capabilities. >

The small signal a.c. impedance of gallium arsenide and silicon p-i-n diodes

Abstract The purpose of this paper is to demonstrate that the impedance of the p - i - n diode is definable as a function of frequency and depends on the diodes geometry and electronic properties. The impedance analysis includes the effects of different electron and hole mobilities, making the model suitable for modeling the a.c. impedance of both silicon and gallium arsenide - i - n diodes. The small signal model shows that for frequencies near the inverse of the intrinsic region carrier lifetime, the diode shows either capacitive or inductive reactance, depending on its geometry. The analysis also indicates that p - i - n diodes with certain combinations of geometry and carrier lifetime show a nearly constant resistance and negligible reactance at all frequencies. At high frequencies for p - i - n diodes of any geometry, the reactive component essentially disappears and the impedance is purely resistive. The series equivalent p - i - n diode impedance model is compared with measured impedance vs frequency data for both silicon and gallium arsenide - i - n diodes.

A project oriented undergraduate CMOS analog microelectronic system design course

This paper presents some of the techniques used at the University of Massachusetts Dartmouth to introduce analog microelectronic system design to undergraduate electrical engineering students. The following paper discusses a wide range of assignments that attempt to address students varied learning styles. These assignments not only take the form of traditional homework, but also include computer aided design and layout projects, in-class group problem solving and laboratory measurements.

Distortion properties of gallium arsenide and silicon RF and microwave switches

An important parameter for RF and microwave system design is the prediction of distortion produced by system components. This paper presents the results of a study on the distortion produced by GaAs and Si RF and microwave switches. The results presented will provide RF and microwave circuit designers with information needed to help decide which switch to use for a specific switching application.

Establishing the minimum reverse bias for a p-i-n diode in a high-power switch

An important circuit design parameter in a high-power p-i-n diode application is the selection of an appropriate applied DC reverse bias voltage. Until now, this important circuit parameter has been chosen either conservatively, using the magnitude of the peak RF voltage, or by empirical trials to determine a possible lower value. The reverse bias requirement for a p-i-n diode operating in a high-power RF and microwave environment is explored. It is demonstrated that the minimum reverse bias voltage is equivalent to the p-i-n diodes self-generated DC voltage under similar RF conditions. A concise expression for this self-generated voltage is developed and experimentally verified and should assist the design engineer in more accurately selecting an appropriate minimum value for the applied reverse bias voltage setting. >

Distortion in microwave and RF switches by reverse biased PIN diodes

An analytical and experimental study of distortion generated by reverse-biased PIN diodes is presented. The fundamental analytical conclusion is that the magnitude of the reverse bias distortion is inversely proportional to the slope of the C-V characteristic (for second-order distortion) and frequency. This is in contrast to the forward-bias PIN diode switch distortion case where the distortion improves with increasing frequency. The analysis shows that thick PIN diodes tend to exhibit less distortion than thin diodes. Experimental distortion data taken at 1000 MHz on diodes of different thicknesses confirm this result.<<ETX>>

The temperature dependence of PIN diode attenuators

The results of a study on PIN diode electrical parameters that ultimately affect the temperature dependence of PIN diode attenuators are presented. It is shown that device passivation and geometry play a major role in governing the resistance-temperature coefficient in PIN diodes. Large capacitance diodes of any passivation are shown to tend toward negative resistance coefficients, indicating that shunt attenuators constructed with these devices will show attenuation levels increasing with temperature. Low-capacitance silicon dioxide passivated diodes (0.1 pF and smaller) typically exhibit resistance-temperature coefficients in the range of -0.1% to +0.1%/ degrees C, corresponding to very small changes of attenuation with temperature. The variation of stored charge with temperature is shown to be a good predictor of the temperature dependence of the PIN diode resistance and ultimately its performance in attenuator applications.<<ETX>>

Distortion in off-state arsenide MESFET switches

This paper presents the results of an investigation into the origin and level of distortion generated by the off-state gallium arsenide MESFET when used as a microwave semiconductor control element. The results show that the drain-gate and gate-source capacitance nonlinearities generate distortion in the device in its off-state. These nonlinearities, which reflect the capacitance-voltage characteristic of the capacitances, can be reduced in as-fabricated devices by increasing the gate reverse bias voltage. The level of distortion monotonically increases with frequency throughout the usable range of the MESFET when used in a series reflective switch. In an SPDT switch application, where both on and off-state devices are used, the distortion level is relatively constant at frequencies in the vicinity of the gate bias cut-off frequency. The nonlinear off-state model is compared with both a SPICE-based analysis, and with experimental data on a GaAs MESFET SPDT switch. The main conclusions to be drawn from the study are that the dominate distortion generated by a GaAs MESFET used in a switch application occurs in the on-state, and that off-state distortion can be only slightly improved in as-fabricated devices. >

Nonlinear stored charge vs d.c. bias-current relationship under high-level injection in pin diodes

The i-region carrer lifetime in p-i-n diodes is frequently measured at a single bias current and the results extrapolated to higher or lower currents. This interpretation is erroneous, however, since high levels of d.c. bias injection can degrade the effective lifetime as seen at the device terminals. This paper shows the dependence of stored charge and carrier lifetime with d.c. bias current and device geometry. Experimental data are used to verify the analysis, which shows that this d.c. bias current dependence of the lifetime may be minimized by minimizing the low level injection carrier lifetime to i-region thickness ratio for a given device area.