Robert O. Grondin

A review of global modeling of charge transport in semiconductors and full-wave electromagnetics

Models of semiconductor devices that combine complex transport models with full-wave solutions of Maxwells equations are reviewed. Both hydrodynamic and ensemble Monte Carlo transport models are studied. The coupling of such transport models with electrodynamics is discussed and sample results are presented. The physical consistency of the models is considered and some open computational challenges are reviewed.

Subpicosecond photoconductivity overshoot in gallium arsenide observed by electro‐optic sampling

Electro‐optic sampling of photoconductive transients on a subpicosecond time scale is used to study hot‐carrier transport in GaAs. The results reported here are interpreted as direct time‐domain observations of nonequilibrium transport on a subpicosecond time scale and they clearly show both an overshoot and bias‐dependent delay at high excitation energy which are consistent with published Monte Carlo predictions.

Electromagnetic and transport considerations in subpicosecond photoconductive switch modeling

The authors discuss a combination of direct finite-difference time-domain solutions of Maxwells equations and Monte Carlo models of photocarrier transport used to avoid assumptions commonly made in developing equivalent circuit models for transmission lines and in other simplifications commonly made in modeling conductivity. Problems that complicate the development of an accurate model for subpicosecond optoelectronic switching and the measurement of electrical waveforms on microstrip lines are discussed. >

Theoretical and experimental investigations of subpicosecond photoconductivity

Monte Carlo methods are used to study photoconductive transients in gallium arsenide. It is demonstrated that working with presently established ranges for the Γ‐L coupling coefficient, the existence of a velocity overshoot at moderate fields cannot be exactly predicted. The role of negative velocity electrons in the initial transient for short wavelength excitation is also demonstrated. Details of an actual experiment are described and evaluated against a model which incorporates the Monte Carlo simulation into a transmission line structure with a frequency‐dependent characteristic impedance. The results demonstrate that an appropriately designed experiment can observe subpicosecond carrier transport transients.

Effects of transient carrier transport in millimeter-wave GaAs diodes

Effects of transient carrier transport on the performance of millimeter-wave GaAs diodes are investigated using results obtained from a Monte Carlo simulation of electron transport. Transit-time devices (such as IMPATTs and TUNNETTs) are discussed first. Mechanisms by which transient effects in the drifting charge pulse may enhance or degrade performance are identified and discussed. Attention is then focused on electron transport in the undepleted epitaxial material which will be present in mixer and varactor diodes and may be present in transit-time diodes. The frequency and signal-level dependence of the conductance of such material is calculated and the implications for device performance are discussed.

Synchronous and asynchronous systems of threshold elements

The role of synchronism in systems of threshold elements (such as neural networks) is examined. Some important differences between synchronous and asynchronous systems are outlined. In particular, important restrictions on limit cycles are found in asynchronous systems along with multi-frequency oscillations which do not appear in synchronous systems. The possible role of deterministic chaos in these systems is discussed.

Ballistic transport in semiconductors

The ballistic transport approximation in semiconductors is considered, in light of recent calculations which show that the accuracy of this approximation is improved when the mass appropriate to this effect is enhanced over the normal effective mass. We show that this enhancement is a consequence of the presence of scattering even on the very short time scale.

VLSI implementation of neural classifiers

The embedding of neural networks in real-time systems performing classification and clustering tasks requires that models be implemented in hardware. A flexible, pipelined associative memory capable of operating in real-time is proposed as a hardware substrate for the emulation of neural fixed-radius clustering and binary classification schemes. This paper points out several important considerations in the development of hardware implementations. As a specific example, it is shown how the ART1 paradigm can be functionally emulated by the limited resolution pipelined architecture, in the absence of full parallelism.

On the existence and detection of Bloch oscillations in superlattices

Abstract While many predicted superlattice behaviors depend on the presence of Bloch oscillations, the existence of such oscillations remains problematical. Here, we consider procedures by which their existence within a superlattice could be detected. We first set upper and lower bounds on the necessary fields. We then demonstrate that while a negative differential mobility is expected, no resonant peak occurs in this mobility at the Bloch frequency. However, we provide two ways of directly observing Bloch oscillations. In the first, we note the existence of structures in the dc velocity-field characteristic when an externally applied RF field has a frequency which is harmonically related to the Bloch frequency. The second approach is to measure the velocity fluctuation noise spectra, which should have a peak at the field-tunable Bloch frequency.

A pipelined associated memory implemented in VLSI

A memory system which rapidly chooses the stored item most closely matching a given input is fundamental to a number of recognition tasks. A memory architecture which performs this function is discussed. In addition, a measure of the quality of the selected (best matching) memory is generated. The architecture is capable of significant data throughput rates and is amenable to implementation using conventional digital VLSI fabrication process. These characteristics are demonstrated by a prototype device fabricated using the MOSIS 3- mu m CMOS design rules, which can compare more than two million 9-bit input works per second. Behavioral simulations demonstrate the applicability of the architecture to some basic recognition tasks. >