Robert W. Wisniewski

Scheduler-conscious synchronization

Efficient synchronization is important for achieving good performance in parallel programs, especially on large-scale multiprocessors. Most synchronization algorithms have been designed to run on a dedicated machine, with one application process per processor, and can suffer serious performance degradation in the presence of multiprogramming. Problems arise when running processes block or, worse, busy-wait for action on the part of a process that the scheduler has chosen not to run. We show that these problems are particularly severe for scalable synchronization algorithms based on distributed data structures. We then describe and evaluate a set of algorithms that perform well in the presence of multiprogramming while maintaining good performance on dedicated machines. We consider both large and small machines, with a particular focus on scalability, and examine mutual-exclusion locks, reader-writer locks, and barriers. Our algorithms vary in the degree of support required from the kernel scheduler. We find that while it is possible to avoid pathological performance problems using previously proposed kernel mechanisms, a modest additional widening of the kernel/user interface can make scheduler-conscious synchronization algorithms significantly simpler and faster, with performance on dedicated machines comparable to that of scheduler-oblivious algorithms.

Scalable spin locks for multiprogrammed systems

Synchronization primitives for large shared-memory multiprocessors need to minimize latency and contention. Software queue-based locks address these goals, but suffer if a process near the end of the queue waits for a preempted processes ahead of it. To solve this problem, the authors present two queue-based locks that recover from in-queue preemption. The simpler, faster lock employs an extended kernel interface that shares information in both directions across the user-kernel boundary. Results from experiments with real and synthetic applications on SGI and KSR multiprocessors demonstrate that high-performance software spin locks are compatible with multiprogramming on both large-scale and bus-based machines.<<ETX>>

High performance synchronization algorithms for multiprogrammed multiprocessors

Scalable busy-wait synchronization algorithms are essential for achieving good parallel program performance on large scale multiprocessors. Such algorithms include mutual exclusion locks, reader-writer locks, and barrier synchronization. Unfortunately, scalable synchronization algorithms are particularly sensitive to the effects of multiprogramming: their performance degrades sharply when processors are shared among different applications, or even among processes of the same application. In this paper we describe the design and evaluation of scalable scheduler-conscious mutual exclusion locks, reader-writer locks, and barriers, and show that by sharing information across the kernel/application interface we can improve the performance of scheduler-oblivious implementations by more than an order of magnitude.

Using communication-to-computation ratio in parallel program design and performance prediction

The authors goal is to be able to predict the performance of a parallel program early in the program development process; to that end they require prediction methods that can be based on incomplete programs. They describe how a single method based on communication-to-computation (C/C) ratio can be used to predict performance accurately and yet fairly simply in some commonly encountered cases. They show how C/C-ratio-based methods are accomplished for both distributed-memory and coherent-memory multiprocessors. They show that focusing on C/C ratio simplifies the use of theory, machine benchmarking and application measurement necessary to provide good parallel performance prediction. In addition, the methods demonstrated are useful because they can be applied to program fragments, or serially executed code.<<ETX>>

Using scheduler information to achieve optimal barrier synchronization performance

Parallel programs frequently use barriers to synchronize successive steps in an algorithm. In the presence of multiprogramming the choice of spinning versus blocking barriers can have a significant impact on performance. We demonstrate how competitive spinning techniques previously designed for locks can be extended to barriers, and we evaluate their performance. We design an additional competitive spinning technique that adapts more quickly in a dynamic environment. We then propose and evaluate a new method that obtains better peformance than previous techniques by using scheduler information to decide between spinning and blocking. The scheduler information technique makes optimal choices incurring little overhead.

A model and tools for supporting parallel real-time applications in Unix environments

As real-time applications become more complex, it becomes increasingly important to provide both a clean model for their development and the ability to verify that their execution matches the development model. In addition to becoming more complex, soft real-time programs are becoming more mainstream, and as such are being run on platforms running some variant of Unix. It is even more important in these environments to be able to monitor a program and understand its behavior. We describe a frame scheduler that provides a simple model to the real-time programmer while maintaining considerable flexibility. We motivate and describe the implementation of FrameView, a set of tools closely coupled with the frame scheduler. Since FrameView and the frame scheduler were developed in conjunction with each other and are tightly coupled, they provide a powerful and efficient means for programmers to implement, analyze and modify soft parallel real-time applications. The frame scheduler is fully implemented in IRIX 5.3, and FrameView is in beta release. In this paper, we describe our experiences building and using the frame scheduler and FrameView.

An argument for a runtime layer SPARTA design

Researchers have used advances in hardware technology to design larger and more complex real-time applications. Larger applications require new integration techniques while more complex applications require a restructuring of the underlying system support. We examine the system design issues of supporting SPARTAs (Soft Parallel Real-Time Applications). There exists a gap between hard real-time kernel mechanisms and the functionality desired by a SPARTA programmer. Thus, an integral part of supporting SPARTA design will be providing an intermediate runtime layer. We describe our experiences building Ephor, including what motivated its conception and development, and the resulting separation of responsibilities both easing SPARTA design and improving their performance.<<ETX>>