Rolf Becker
NXP Semiconductors
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Publication
Featured researches published by Rolf Becker.
IEEE Journal of Solid-state Circuits | 2006
Barbara Baggini; Philipp Basedau; Rolf Becker; Peter Bode; Ralf Burdenski; Farzad Esfahani; Willem H. Groeneweg; Markus Helfenstein; Alexander Lampe; Roland Ryter; Ralph Stephan
A complete mixed-signal front-end CMOS chip is presented, supporting GSM/EDGE as well as enhanced audio applications. The chosen solution for the transmit section is based on Laurents approximation of the nonlinear GMSK modulator. This enables burst shaping in the I/Q domain thereby solving the problem of power ramping. Also, up to GPRS class 12 is supported. The receive section on the other hand consists of a low power dual mode continuous-time /spl Sigma//spl Delta/ ADC for I and Q, supporting ZIF and LIF modes of operation and achieving typically 12.5 bit of resolution under production conditions. An on-chip PLL, which supplies all blocks with various clock frequencies, additionally supports clock jitter suppression. The audio section comprises a codec supporting standard formats such as IIS and PCM. It features mono/stereo signaling from various sources in 16bit quality as well as high-drive buffers for 4 /spl Omega/ single-ended loads (capacitively coupled). The whole chip is powered from a 1.5/2.65 V supply voltage and consumes 22 mW in paging mode.
symposium on vlsi circuits | 2003
Farzad Esfahani; Philipp Basedau; Roland Ryter; Rolf Becker
A low-power fourth order continuous-time complex /spl Sigma//spl Delta/ ADC has been designed and fabricated for low-IF (LIF) GSM and EDGE receivers in a 0.25 /spl mu/m CMOS technology. This ADC has a bandwidth of 270 kHz centered around-100 kHz. The dynamic range (DNR) is 82 dB at a sampling rate of 13 MHz even though the digital decimation filter and other blocks are active on the chip. The power consumption is 4.6 mW at 2 V supply. To our knowledge this ADC has the best performance, which has been reported so far with a complex /spl Sigma//spl Delta/ ADC for LIF mode GSM and EDGE receivers.
IEEE Journal of Solid-state Circuits | 2006
Rolf Becker; Willem H. Groeneweg
An audio amplifier in a standard 90-nm dual gate-oxide CMOS technology is designed for direct connection to the battery in a mobile phone. Special techniques have been applied to run it from a supply voltage of up to 5.5 V. The circuit does not require a dedicated supply voltage generator; it can be integrated on the same chip with the digital signal processor, and provides high output power, good power supply rejection, and good efficiency
IEEE Journal of Solid-state Circuits | 1991
Rolf Becker; Jaap Mulder
A CMOS-circuit is presented containing an analog switched-capacitor processor for detection of DTMF* and signalling tones on a telephone subscriber-line and a digital detection algorithm for postprocessing. The chip has been designed to work with low current consumption at low supply voltages and is fabricated in a standard CMOS-technology with self-aligned contacts [1] for digital circuits.
international symposium on circuits and systems | 2003
F. Esahani; Philipp Basedau; Roland Ryter; Rolf Becker
A low-power complex fourth order continuous-time /spl Sigma//spl Delta/ ADC for GSM and EDGE applications has been designed and fabricated in a 0.25 /spl mu/m CMOS technology. This ADC has a bandwidth of 270 kHz centered around -100 kHz. The achieved dynamic range (DNR) is 82 dB at a sampling rate of 13 MHz. The power consumption is 4.6 mW at 2 V supply. To our knowledge this is the best performance, which has been reported so far for a complex /spl Sigma//spl Delta/ ADC for GSM/EDGE receivers in CMOS technology working in low-IF (LIF) mode.
midwest symposium on circuits and systems | 1999
Barbara Baggini; Rolf Becker; H.-U. Schroder; Ralf Burdenski; Martin Simon
A low cost CMOS process controller for power amplifiers (PAs) in TDMA standards is presented. It fits into a 3/spl times/3 mm/sup 2/ package for minimum PCB area. Low pin count imposes digital control by switching on the supply and monitoring steps of some millivolts. It prevents PA damage for high VSWR and uses ESD protection accepting negative voltages in an n-well process.
international symposium on circuits and systems | 2003
Rolf Becker; Willem H. Groeneweg; Ralf Burdenski
An important aspect of any cellular communication system is to control the output power P/sub OUT/ of the power amplifier (PA), which feeds the radio signal to the antenna. A potential set-up is described, which enables proper control of P/sub OUT/ in presence of magnitude modulation during bursts and supports ramping-up and -down for both GMSK and 8PSK modulation schemes.
asia pacific conference on circuits and systems | 2012
Amir Owzar; Ertan Baykal; P. Felicio; T. Zheng; Ralph Stephan; Markus Helfenstein; Rolf Becker
This publication includes a comparison between the performance of mixed signal and digital IPs implemented in SOI and bulk technology. The investigated parameter covered all important parameters for benchmarking of wireless application. Based on the extracted parameters for the digital blocks improvement have been achieved by using SOI without having negative impact on AMS parameter.
european solid-state circuits conference | 2005
Rolf Becker; Willem H. Groeneweg
An audio amplifier in a standard 90-nm CMOS technology is designed for direct battery hook-up in a mobile phone. Special techniques have been applied to run it from a supply voltage of up to 5.5 V. The circuit does not require a dedicated supply voltage generator, it can be integrated on the same chip with the digital signal processor, provides high output power, good power supply rejection and good efficiency.
european solid-state circuits conference | 2013
Rolf Becker; Aleksandar Zhelyazkov; Bernie Kim
Liquid-Crystal Displays (LCDs) can exhibit a strong variation of optical performance parameters as a function of temperature. We present driver circuitry, which comprises a temperature sensor and the appropriate signal-processing to compensate for this behaviour.