Ron Hogervorst

A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries

This paper presents a two-stage, compact, power-efficient 3 V CMOS operational amplifier with rail-to-rail input and output ranges. Because of its small die area of 0.04 mm/sup 2/, it is very suitable as a VLSI library cell. The floating class-AB control is shifted into the summing circuit, which results in a noise and offset of the amplifier which are comparable to that of a three stage amplifier. A floating current source biases the combined summing circuit and the class-AB control. This current source has the same structure as the class-AB control which provides a power-supply-independent quiescent current. Using the compact architecture, a 2.6 MHz amplifier with Miller compensation and a 6.4 MHz amplifier with cascoded-Miller compensation have been realized. The opamps have, respectively, a bandwidth-to-supply-power ratio of 4 MHz/mW and 11 MHz/mW for a capacitive load of 10 pF. >

CMOS low-voltage operational amplifiers with constant-G/sub m/ rail-to-rail input stage

Two 3.3-V operational amplifiers with constant-gm rail-to-rail input stage and rail-to-rail output stage are presented. The constant transconductance (gm) ensures a constant unity-gain frequency within the whole commonmode input range. Two new methods to control thegm are introduced. Both operational amplifiers use the same rail-to-rail output stage. The operational amplifiers have been integrated in a CMOS semicustom process with transistor lengths of 10µm. The common-mode input voltage swing extends beyond the positive supply rail by 400 mV and beyond the negative supply rail by 200 mV. The output voltage is able to reach within 130 mV of the supply rails. The output current of the operational amplifiers is 2 mA and the voltage gain is 85 dB. The unity-gain frquency is 165 kHz, which is mainly limited by the relatively long transistor lengths of 10µm. In another process with channel lengths of 2µm, simulation results showed that a unity-gain frequency of 4 MHz can easily be obtained.

Design of low-voltage, low-power operational amplifier cells

Preface. List of Symbols. 1. Introduction. 2. Low-Voltage Analog Design Considerations. 3. Input Stages. 4. Output Stages. 5. Overall Topologies. 6. Realizations. Index.

Low-power low-voltage VLSI operational amplifier cells

VLSI operational amplifier cells that approach the physical limitations of bandwidth, gain and power consumption are here described. To this purpose several HF compensation architectures are presented, such as parallel, Miller, multipath nested Miller, and multipath hybrid nested Miller.

A programmable 1.5 V CMOS class-AB operational amplifier with hybrid nested Miller compensation for 120 dB gain and 6 MHz UGF

Traditionally, CMOS operational amplifiers apply cascoding techniques to ensure an acceptable gain with a minimal number of gain stages. The use of cascode transistors, however, limits the lowest supply voltage of a CMOS op amp. Lowering the threshold voltage of the MOS process, a development already initiated by many VLSI processing facilities, does not lead to a lower minimum supply voltage of the cascode circuits. On the contrary, below a certain threshold voltage the cascode circuits cease to operate. This effect, that renders an important class of op amp circuits useless in the near future, is caused by the independence of the saturation voltage V/sub Daat/ of a MOS device from the threshold voltage V/sub th/. The proposed solution for compensation is the hybrid nested Miller compensation (HNMC) structure or multipath hybrid nested Miller compensation (MHNMC) structure. These structures are discussed and adopted in op amps realized in a standard V/sub th/=0.6 V CMOS process. >

Compact CMOS constant-g/sub m/ rail-to-rail input stage with g/sub m/-control by an electronic zener diode

A family of compact CMOS rail-to-rail input stages with constant-g/sub m/ is presented. To attain a constant-g/sub m/ over the whole common-mode input range, an electronic zener diode is inserted between the tails of the complementary input pairs. This zener keeps the sum of the gate-source voltages of the input pairs, and therefore the g/sub m/ of the rail-to-rail input stage, constant. Two possible implementations of the zener have been realized and inserted in a rail-to-rail input stage. These input stages are implemented in two two-stage compact amplifiers. Both amplifiers have been realized in a 1 /spl mu/m BiCMOS process. They have a unity-gain frequency of 2-MHz, for a capacitive load of 20 pF.

A programmable 3-V CMOS rail-to-rail opamp with gain boosting for driving heavy resistive loads

This paper describes a programmable 3-V CMOS rail-to-rail opamp with gain boosting. The unity-gain frequency can be programmed from 0.5 to 4 MHz, for a load of 50 pF, by changing the supply current from 55 to 390 /spl mu/A. The g/sub m/-control of the input stage functions regardless of its operating region, whether it is weak or strong inversion. This allows an optimal frequency compensation over the total programming range. The opamp features a low-voltage gain-boosting technique which provides a high gain of about 120 dB, even for loads of 50 /spl Omega/. The opamp has been designed in a 1 /spl mu/m BiCMOS process.

Low-voltage low-power amplifiers

Low-voltage and low-power amplifiers are strongly limited in dynamic range (DR) and bandwidth (B). The maximum dynamic-range/supply-power ratio is restricted to DR/sub max//P/sub sup/ = /spl pi//16 kTBe by thermal noise in resistors. To obtain this maximum value, several rail-to-rail (R-R) input stages and R-R output stages biased in class-AB are designed. The maximum bandwidth/supply-power ratio is restricted to B/sub 0max//P/sub sup/ = 3/C/sub L/V/sub sup/, and B/sub 0max//P/sub sup/ = 1/120I/sup 1/2//sub D/C/sub L/V/sub sup/, respectively, for bipolar and CMOS transistors. To obtain this maximum value at a sufficient amount of low-frequency gain, several compensation structures are designed, such as parallel, Miller, and multipath nested Miller compensation.<<ETX>>

Low-voltage low-power opamp based amplifiers

Amplifiers operating under low-voltage and low-power conditions are strongly limited in dynamic range and bandwidth. The maximum dynamic range is limited by the supply power and the thermal noise power in resistors. To obtain the maximum, input and output stages should be able to process signals from rail to rail. Several rail-to-rail input stages and rail-to-rail output stages biased in current-efficient class-AB mode are presented. Also, the bandwidth is limited by the low-power constraint. To reach the maximum bandwidth at sufficient DC gain, the effectivity of several frequency compensation structures is compared, such as Parallel, Miller, and Nested Miller Compensation. Finally, it is shown that the Multipath Nested Miller Compensation combines a very high bandwidth with high gain, while being insensitive to process parameters.

Translinear Circuits in Low-Voltage Operational Amplifiers

Operational amplifiers are limited in their dynamic voltage range and bandwidth by the supply voltage and power. To obtain the maximum dynamic range, power-efficient rail-torail class-AB output stages and voltage-efficient rail-to-rail input stages are needed. In order to implement the desired class-AB behavior in rail-to-rail output stages and the desired constant transconductance in rail-to-rail input stages, translinear circuits are used extensively.