Ross E. Teggatz

Bipolar issues in advanced power BiCMOS technology

Technology is driven by the evolving CMOS roadmap, and as a consequence, it is increasingly difficult to integrate high performance bipolar devices without unduly increasing process complexity. Designers want and need good NPN devices for key circuits; a table of some of these is outlined. Bipolar device needs and the difficulties of device performance vs. integration are described for typical advanced power BiCMOS technology with respect to design concerns. Other bipolar issues relating to guard-ring, parasitics, and ESD concerns are also briefly discussed.

The role of bipolar structures in a power MOS process

Modern power IC processes usually optimize DMOS outputs, with little emphasis on bipolar structures, for wafer cost reasons. We describe the role of bipolar structures in a high efficiency power IC process, and design techniques to allow use of non-optimized bipolar devices.