Russell A. Lawton

Microfabricated ion accelerator grid design issues - Electric breakdown characteristics of silicon dioxide insulator material

Low-temperature (LTO) chemical vapor deposited (CVD) silicon dioxide was investigated for use as an insulator material in microfabricated ion engine accelerator grids. Both substrate (bulk) as well as surface breakdown experiments were performed. Oxide thicknesses for substrate breakdown tests ranged between 1 jim and 3.9 um. Surface breakdowns were performed over gap distances ranging between 5 um and 600 |im. Substrate breakdown strengths up to 600-700 V/p.m were measured, allowing for maximum stand-off voltages o f 2500 V. A slight decrease in breakdown field strength for larger thicknesses was observed. Temperature effects on substrate breakdown field strengths do exist, however, are small . Only a 15% drop in breakdown field strength was noted at 400 C vs. strengths measured at room temperature. Surface breakdown field strengths ranged as high as 140 V/|im , leading t o a stand-off capability of 700 V over a 5 |im oxide film. Tests were performed to study the influence of silicon oxide surface morphology on the surface breakdown strength and none was found.

Healing of voids in the aluminum metallization of integrated circuit chips

A thermal treatment for healing voids in the aluminum metallization of integrated circuit (IC) chips has been discovered. The aluminum metallization is alloyed with nominally 1 wt.% of silicon. This discovery arose from efforts to cause further growth of preexisting voids in IC RAMs intended for long-term unattended spacecraft applications. The experimental effort was intended to cause further void propagation for the purpose of establishing a time/temperature propagation relationship, but it resulted instead in a healing of the voids. The thermal treatment consisted of heating IC chips with voids in the aluminum/silicon metallization to temperatures in excess of 200 degrees C, followed by quick immersion into liquid nitrogen. The thermal treatment is described, and a theory based on silicon solubility and migration in aluminum is advanced to explain both the formation and the healing of voids in the aluminum metallization of IC chips. >

Characterization of nonplanar motion in MEMS involving scanning laser interferometry

A study to evaluate three processes used for the release of standard devices produced by MCNC using the MUMPS process was undertaken by Jet Propulsion Laboratory with the collaboration of The Aerospace Corporation, and Polytec PI. The processes used were developed at various laboratories and are commonly the final step in the production of micro- electro-mechanical systems prior to packaging. It is at this stage of the process when the devices become extremely delicate and are subject to yield losses due to handling errors or the phenomenon of stiction. The effects of post processing with HF on gain boundaries and subsequent thermal processing producing native oxide growth during packaging will require further investigation.

Proof-of-concept demonstration of a vaporizing liquid micro-thruster

Proof-of-concept testing of a microfabricated vaporizing liquid thruster was performed. In this liquid-fed thruster concept, propellant vaporization is achieved in a microfabricated thin film heater arrangement. Chip temperatures of 100, 150 and 200 C were achieved at power levels of 3.5, 5.5 and 7.5 W. Voltage requirements were below 5 V for these temperature values. A substantial fraction of the heat was believed to have been conducted into the packaging material. Thermal characterization tests of chips placed onto insulating Pyrex blocks resulted in temperatures of about 90 and 150 C for power levels of 1.2 and 2.5 W, respectively, thus cutting thermal losses by more than half. One thruster chip was tested using water as a liquid propellant and vaporization was achieved at 7 W electric input power.

Micro nano technology visualization (MNTV) of micromachined MEMS polysilicon structures

Micro-Nano Technology Visualization (MNTV) is critical to studies in MEMS reliability. The ability to see and characterize the microstructures and interfaces with high resolution at the microscale and nanoscale is invaluable. In this paper we present the motivation, paradigm and examples of visualization techniques applied to several aspects of surface micromachined polysilicon structures. High resolution cross-section imaging, using both a FIB/SEM and FIB/STEM, is used to acquire information on profile differences between fabrication facilities and grain size and orientation. The AFM is used to compare surface roughness on both sides (top and bottom surfaces) of thin film polysilicon after release etching. The data gathered will be extremely useful feedback for fabrication facilities in terms of process characterization and quality assurance. The data will also be useful for MEMS CAD tools where device and process models must be validated.

MEMS technology at NASA's Jet Propulsion Laboratory

The MEMS Technology Group is part of the Microdevices Laboratory (MDL) at the Jet Propulsion Laboratory (JPL). The group pursues the development of a wide range of advanced MEMS technologies that are primarily applicable to NASAs robotic as well as manned exploration missions. Thus these technologies are ideally suited for the demanding requirements of space missions namely, low mass, low power consumption and high reliability, without significant loss of capability. End-to-end development of these technologies is conducted at the MDL, a 38,000 sq. ft. facility with approximately 5500 sq. ft. each of cleanroom (class 10 - 100,000) and characterization laboratory space. MDL facilities include computer design and simulation tools, optical and electron-beam lithography, thin film deposition equipment, dry and wet etching facilities including Deep Reactive Ion Etching, device assembly and testing facilities. Following the fabrication of the device prototypes, reliability testing of these devices is conducted at the state-of-the-art Failure Analysis Laboratory at JPL.