Ryan C. Grammenos

Performance Analysis of Selective Opportunistic Spectrum Access With Traffic Prediction

In cognitive radio (CR) networks, the ability to capture a frequency slot for transmission in an idle channel has a significant impact on the spectrum efficiency and quality of service (QoS) of a secondary user (SU). The radio frequency (RF) front-ends of an SU have limited bandwidth for spectrum sensing with the target frequency bands dispersed in a discontinuous manner. This results in the SU having to sense multiple target frequency bands in a short period of time before selecting an appropriate idle channel for transmission. This paper addresses this technical challenge by proposing a selective opportunistic spectrum access (SOSA) scheme. With the aid of statistical data and traffic prediction techniques, our SOSA scheme can estimate the probability of a channel appearing idle based on the statistics and choose the best spectrum-sensing order to maximize spectrum efficiency and maintain an SUs connection. By means of doing so, this SOSA scheme can preserve the QoS of an SU while improving the system efficiency. In contrast to previous work, we consider the practical issues encountered by an SU in a wireless environment, such as discontinuous target frequency bands and limited spectrum-sensing ability. We examine the spectrum-sensing scheme in terms of packet loss ratio (PLR) and throughput. The simulation results show that the proposed SOSA scheme can decrease the probability of packet losses in the discontinuous spectrum environment and improve the spectrum efficiency.

An Improved Fixed Sphere Decoder Employing Soft Decision for the Detection of Non-orthogonal Signals

This letter proposes a hybrid soft iterative method together with Fixed Sphere Decoding (FSD) concurrently optimize performance and complexity. We show that for bandwidth compression factors of up to 25 percent, we can achieve the same performance as Orthogonal Frequency Division Multiplexing (OFDM). For systems with bandwidth compression higher than 25 percent, the complexity/performance trade-offs of the hybrid method are better than those of Truncated Singular Value Decomposition-FSD (TSVD-FSD).

FPGA design of a truncated SVD based receiver for the detection of SEFDM signals

This work presents the hardware design of a novel algorithm using Field Programmable Gate Arrays (FPGAs) for the detection of Spectrally Efficient Frequency Division Multiplexing (SEFDM) signals. Previous work has shown that a sub-optimal Truncated Singular Value Decomposition (TSVD) approach is well-suited for use in SEFDM systems. TSVD offers a targeted reduction in complexity while outperforming linear detectors, such as Zero Forcing (ZF) and Minimum Mean Squared Error (MMSE), in terms of Bit Error Rate (BER). This is the first time a hardware design for the TSVD algorithm has been devised for implementation on an FPGA device using Very high speed integrated circuit Hardware Description Language (VHDL). Results show excellent fixed-point performance which are comparable to existing floating-point computer-based simulations. The optimal parameters required to achieve this outcome combined with their effect on system performance are identified. The impact of finite FPGA resources against performance gain is also examined.

A verification methodology for the detection of spectrally efficient FDM signals generated using reconfigurable hardware

Simulation, using a model of a system or process, is widely accepted as a method of qualification and evaluation of complex systems. The success of a simulation depends on the accuracy of user defined values used to model parameters, which are gathered by analytical or empirical methods. In situations where some parameters are unknown or difficult to quantify, it is required to perform those operations in a real-world situation. Often, moving from a simulation environment to a hardware environment can result in considerable development and implementation challenges. Hence, simulation in conjunction with hardware, so called in the loop validation, can provide a fast method for verification and a reduction in development time. This paper concerns the successful signal transmission and reception of a recently proposed communication scheme, termed as Spectrally Efficient Frequency Division Multiplexing (SEFDM). Signal transmission is verified using in the loop methodology. Experimentally generated signals from a bespoke reconfigurable Field Programmable Gate Array (FPGA) are sampled, using an oscilloscope and formatted for detection using a model of the FPGA architecture together with an analytical model of the SEFDM transmitter. Subsequently, such signals form the input to an analytical receiver model which is used to confirm the experimental signals and hence, exemplifies the in the loop methodology to form an SEFDM pseudo-transceiver.

FPGA implementations of real-time detectors for a spectrally efficient FDM system

A new method for detecting Spectrally Efficient Frequency Division Multiplexing (SEFDM) is proposed and verified through modelling and practical FPGA implementation. The method is derived through studies of two sphere decoding techniques, namely Fixed SD (FSD) with Sort-Free (SF) and Non-Sort-Free (NSF) algorithms. We report a co-simulation verification framework to verify the performance of these detectors and to choose an optimum design. Finally, a hybrid detector Truncated Singular Value Decomposition-Fixed Sphere Detector (TSVD-FSD) is tested on the FPGA platform. Error behaviour is studied for the practical FPGA system and then compared with theoretical/ideal modelling. Detailed analysis indicates the suitability of our design and implementation methods for SEFDM detection with 16 carriers and 25% bandwidth saving.

Performance trade-offs and DSP evaluation of spectrally efficient FDM detection techniques

Previous work has shown that Spectrally Efficient Frequency Division Multiplexing (SEFDM) systems yield up to 40% bandwidth savings at the expense of receiver complexity. Maximum Likelihood (ML) and Sphere Decoding (SD) suffer from an impractical computational complexity. Hybrid detectors, such as Truncated Singular Value Decomposition (TSVD) with fixed complexity SD offer a notable reduction in complexity while maintaining an acceptable error performance. Yet, for high-dimensional systems, even these reduced complexity detectors present challenges for implementation. Hence, in this work, we apply Sort-Free (SF) and Modified Real Valued Decomposition (MRVD) techniques to obtain targeted reduction in computational complexity and improved error performance. Our findings are validated via simulation and practical experimentation with the aid of a Digital Signal Processor (DSP) chip.

Hardware implementation of a practical complexity Spectrally Efficient FDM reconfigurable receiver

Spectrally Efficient Frequency Division Multiplexing (SEFDM) systems offer significant bandwidth gains at the expense of receiver complexity. While Maximum Likelihood (ML) and Sphere Decoding (SD) yield optimum performance, these techniques suffer from an impractical computational complexity. Previous work has shown that hybrid detectors combining Truncated Singular Value Decomposition (TSVD) with Fixed SD (FSD) offer a targeted reduction in complexity with an acceptable error performance. This work describes a modified FSD adopting a Sort-Free (SF) approach to make the algorithm better-suited for application in the real world. It further presents for the first time the hardware implementation of a TSVD-FSD using Field Programmable Gate Arrays (FPGAs) and Digital Signal Processors (DSPs). The TSVD detector is realized on an FPGA with a flexible and reconfigurable design supporting different system sizes, modulation orders and levels of bandwidth compression while providing a data rate of up to 136.8 Mbps. The modified FSD is implemented on a DSP and is shown to provide up to six times greater speed when compared to the conventional FSD. The error performance, computational complexity and resource utilization of the system are examined.

Selective spectrum sensing and access based on traffic prediction

In cognitive radio (CR) networks, the ability to capture a frequency slot for transmission in a vacant channel has a significant impact on the spectrum efficiency and quality of service (QoS) of a CR user. Important factors include spectrum handoff, transmission rate and delay. This paper proposes a framework for sensing and selecting channels that have the highest probability of appearing idle while reducing the corresponding sensing time. In contrast to previous work, we consider the practical issues encountered by a CR user in a wireless environment, such as discontinuous target frequency bands and limited spectrum sensing ability. We examine the spectrum sensing scheme in terms of packet loss ratio (PLR). The simulation results show that the proposed spectrum sensing strategy can decrease the probability of packet losses in the discontinuous spectrum environment and improve spectrum efficiency.

Spectrally Efficient Frequency Division Multiplexing for 5G

The focus of this chapter is on novel multi-carrier communication techniques, which share the common goal of increasing spectrum efficiency in future communication systems. In particular, a technology termed Spectrally Efficient Frequency Division Multiplexing (SEFDM) is described in detail outlining its benefits, challenges and trade-offs when compared to the current state-of-the-art. A decade of research has been devoted to examining SEFDM from different angles; mathematical modelling, algorithm optimisation, hardware implementation and system experimentation. The aim of this chapter is to therefore give a taste of this technology and in doing so, the chapter is organised as follows; first, it is explained how SEFDM fits within the remit of future 5th Generation (5G) communication systems; second, the design principles and implementation trade-offs associated with SEFDM systems are described; third, a number of linear and more sophisticated polynomial detection schemes are compared in terms of performance and complexity; finally, the chapter concludes by outlining a number of experimental testbeds which have been developed for the purpose of evaluating the performance of SEFDM in practical scenarios.