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Dive into the research topics where S. Arun-Kumar is active.

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Featured researches published by S. Arun-Kumar.


Acta Informatica | 1992

An efficiency preorder for processes

S. Arun-Kumar; Matthew Hennessy

A simple efficiency preorder for CCS processes is introduced in whichp≲q means thatq is at least as fast asp, or more generally,p uses at least as much resources asq. It is shown to be preserved by all CCS contexts except summation and it is used to analyse a non-trivial example: two different implementations of a bounded buffer. Finally we give a sound and complete proof system for finite processes.


Lecture Notes in Computer Science | 2000

Reflecting BDDs in Coq

Kumar Neeraj Verma; Jean Goubault-Larrecq; Sanjiva Prasad; S. Arun-Kumar

We describe an implementation and a proof of correctness of binary decision diagrams (BDDs), completely formalized in Coq. This allows us to run BDD-based algorithms inside Coq and paves the way for a smooth integration of symbolic model checking in the Coq proof assistant by using reflection. It also gives us, by Coqs extraction mechanism, certified BDD algorithms implemented in Caml. We also implement and prove correct a garbage collector for our implementation of BDDs inside Coq. Our experiments show that this approach works in practice, and is able to solve both relatively hard propositional problems and actual industrial hardware verification tasks.


international workshop on dynamic analysis | 2006

Dynamic code instrumentation to detect and recover from return address corruption

Suhas Gupta; Pranay Pratap; Huzur Saran; S. Arun-Kumar

Return address corruption on the stack using buffer overflow attacks is one of the most common ways in which the security of a system can be compromised. This paper provides a way of detecting return address corruption on the stack using dynamic code instrumentation. The detection is done at run-time and it does not depend on the availability of source code of the vulnerable application. The approach we are presenting is not limited only to buffer overflows, rather it can handle any kind of return address corruption. Furthermore, cases in which recovery from stack corruption is possible and the mechanisms for recovery in such cases have also been discussed.


Archive | 1995

Conformance: A Precongruence close to Bisimilarity

S. Arun-Kumar; V. Natarajan

In a previous paper we had defined the notion of an efficiency preorder for concurrent systems. In this paper, we present a coarser relation, called the elaboration preorder, which is finer than observational equivalence. Further, this preorder is incomparable with the almost-weak bisimulation preorder of Sangiorgi and Milner. In particular, the elaboration preorder is preserved under all contexts except summation. The largest precongruence contained in it, which we call conformance, is obtained by the usual means and a complete axiomatization for conformance of finite processes is given. The paper ends with an example to show the use of this relation.


international conference on theoretical aspects of computer software | 1991

An Efficiency Preorder for Processes

S. Arun-Kumar; Matthew Hennessy

A simple efficiency preorder for CCS processes is introduced in which p≲q means that q is at least as fast as p, or more generally, p uses at least as much resources as q. It is shown to be preserved by all CCS contexts except summation and it is used to analyse a non-trivial example: two different implementations of a bounded buffer. Finally a sound and complete proof system for finite processes is given.


computer aided verification | 2012

On decidability of prebisimulation for timed automata

Shibashis Guha; Chinmay Narayan; S. Arun-Kumar

In this paper, we propose an at least as fast as relation between two timed automata states and investigate its decidability. The proposed relation is a prebisimulation and we show that given two processes with rational clock valuations it is decidable whether such a prebisimulation relation exists between them. Though bisimulation relations have been widely studied with respect to timed systems and timed automata, prebisimulations in timed systems form a much lesser studied area and according to our knowledge, this is the first of the kind where we study the decidability of a timed prebisimulation. This prebisimulation has been termed timed performance prebisimulation since it compares the efficiency of two states in terms of their performances in performing actions. if s and t are time abstracted bisimilar and every possible delay by s and its successors is no more than the delays performed by t and its successors where the delays are real numbers. The prebisimilarity defined here falls in between timed and time abstracted bisimilarity.


Electronic Notes in Theoretical Computer Science | 2006

Flexible Communication of Agents based on FIPA-ACL

M. Jamshid Bagherzadeh; S. Arun-Kumar

Communication in multi-agent systems is an important subject of the current research. In this paper, the syntax and semantics of a multi-agent programming language, called ECCS, are defined. We focus specially on the communication of agents. The main contribution of this paper is a new and flexible way of communication of agents. We finally work out a well known protocol as an example.


international conference on concurrency theory | 2014

Reducing Clocks in Timed Automata while Preserving Bisimulation

Shibashis Guha; Chinmay Narayan; S. Arun-Kumar

Model checking timed automata becomes increasingly complex with the increase in the number of clocks. Hence it is desirable that one constructs an automaton with the minimum number of clocks possible. The problem of checking whether there exists a timed automaton with a smaller number of clocks such that the timed language accepted by the original automaton is preserved is known to be undecidable. In this paper, we give a construction, which for any given timed automaton produces a timed bisimilar automaton with the least number of clocks. Further, we show that such an automaton with the minimum possible number of clocks can be constructed in time that is doubly exponential in the number of clocks of the original automaton.


EXPRESS/SOS | 2013

A Unifying Approach to Decide Relations for Timed Automata and their Game Characterization

Shibashis Guha; Shankara Narayanan Krishna; Chinmay Narayan; S. Arun-Kumar

In this paper we present a unifying approach for deciding various bisimulations, simulation equivalences and preorders between two timed automata states. We propose a zone based method for deciding these relations in which we eliminate an explicit product construction of the region graphs or the zone graphs as in the classical methods. Our method is also generic and can be used to decide several timed relations. We also present a game characterization for these timed relations and show that the game hierarchy reflects the hierarchy of the timed relations. One can obtain an infinite game hierarchy and thus the game characterization further indicates the possibility of defining new timed relations which have not been studied yet. The game characterization also helps us to come up with a formula which encodes the separation between two states that are not timed bisimilar. Such distinguishing formulae can also be generated for many relations other than timed bisimilarity.


international conference on logic programming | 2005

Layered Clausal Resolution in the Multi-modal Logic of Beliefs and Goals

M. Jamshid Bagherzadeh; S. Arun-Kumar

In this paper a proof technique for reasoning about the multi-modal logic of beliefs and goals is defined based on resolution at different levels of a tree of clauses. We have considered belief and goal as normal modal logic operators. The technique is inspired by that in [6,7] and allows for a locality property to be satisfied. The main motivation for this work arises not as much from theorem-proving as from the notion of belief and goal revision under an assumption of consistency of the beliefs and goals of an agent. We also present proofs of soundness and completeness of the logic.

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Chinmay Narayan

Indian Institute of Technology Delhi

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Shibashis Guha

Indian Institute of Technology Delhi

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M. Jamshid Bagherzadeh

Indian Institute of Technology Delhi

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Sanjiva Prasad

Indian Institute of Technology Delhi

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Divyanshu Bagga

Indian Institute of Technology Delhi

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Huzur Saran

Indian Institute of Technology Delhi

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Pranay Pratap

Indian Institute of Technology Delhi

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Shankara Narayanan Krishna

Indian Institute of Technology Bombay

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Suhas Gupta

Indian Institute of Technology Delhi

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